203 lines
5.9 KiB
C
203 lines
5.9 KiB
C
/* $NetBSD: dw_apb_uart.c,v 1.12 2022/04/08 10:17:54 andvar Exp $ */
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/*-
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* Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(1, "$NetBSD: dw_apb_uart.c,v 1.12 2022/04/08 10:17:54 andvar Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <sys/intr.h>
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#include <sys/systm.h>
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#include <sys/time.h>
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#include <sys/termios.h>
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#include <dev/ic/comvar.h>
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#include <dev/fdt/fdtvar.h>
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static int dw_apb_uart_match(device_t, cfdata_t, void *);
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static void dw_apb_uart_attach(device_t, device_t, void *);
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static const struct device_compatible_entry compat_data[] = {
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{ .compat = "snps,dw-apb-uart" },
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DEVICE_COMPAT_EOL
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};
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struct dw_apb_uart_softc {
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struct com_softc ssc_sc;
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void *ssc_ih;
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struct clk *ssc_clk;
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struct clk *ssc_pclk;
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struct fdtbus_reset *ssc_rst;
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};
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CFATTACH_DECL_NEW(dw_apb_uart, sizeof(struct dw_apb_uart_softc),
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dw_apb_uart_match, dw_apb_uart_attach, NULL, NULL);
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static int
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dw_apb_uart_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct fdt_attach_args * const faa = aux;
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return of_compatible_match(faa->faa_phandle, compat_data);
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}
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static void
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dw_apb_uart_attach(device_t parent, device_t self, void *aux)
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{
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struct dw_apb_uart_softc * const ssc = device_private(self);
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struct com_softc * const sc = &ssc->ssc_sc;
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struct fdt_attach_args * const faa = aux;
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const int phandle = faa->faa_phandle;
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bus_space_tag_t bst = faa->faa_bst;
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bus_space_handle_t bsh;
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char intrstr[128];
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bus_addr_t addr;
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bus_size_t size;
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u_int reg_shift, reg_iowidth;
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int error;
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if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
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aprint_error(": couldn't get registers\n");
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return;
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}
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if (of_getprop_uint32(phandle, "reg-shift", ®_shift)) {
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/* missing or bad reg-shift property, assume 2 */
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reg_shift = 2;
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}
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if (of_getprop_uint32(phandle, "reg-io-width", ®_iowidth)) {
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/* missing or bad reg-io-width property, assume 1 */
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reg_iowidth = 1;
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}
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sc->sc_dev = self;
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ssc->ssc_clk = fdtbus_clock_get_index(phandle, 0);
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if (ssc->ssc_clk == NULL) {
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aprint_error(": couldn't get clock\n");
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return;
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}
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if (clk_enable(ssc->ssc_clk) != 0) {
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aprint_error(": couldn't enable clock\n");
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return;
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}
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ssc->ssc_pclk = fdtbus_clock_get(phandle, "apb_pclk");
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if (ssc->ssc_pclk != NULL && clk_enable(ssc->ssc_pclk) != 0) {
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aprint_error(": couldn't enable peripheral clock\n");
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return;
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}
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ssc->ssc_rst = fdtbus_reset_get_index(phandle, 0);
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if (ssc->ssc_rst && fdtbus_reset_deassert(ssc->ssc_rst) != 0) {
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aprint_error(": couldn't de-assert reset\n");
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return;
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}
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sc->sc_frequency = clk_get_rate(ssc->ssc_clk);
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sc->sc_type = COM_TYPE_DW_APB;
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error = bus_space_map(bst, addr, size, 0, &bsh);
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if (error) {
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aprint_error(": couldn't map %#" PRIx64 ": %d", (uint64_t)addr, error);
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return;
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}
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com_init_regs_stride_width(&sc->sc_regs, bst, bsh, addr, reg_shift, reg_iowidth);
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com_attach_subr(sc);
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if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
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aprint_error_dev(self, "failed to decode interrupt\n");
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return;
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}
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ssc->ssc_ih = fdtbus_intr_establish_xname(phandle, 0,
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IPL_SERIAL, FDT_INTR_MPSAFE, comintr, sc, device_xname(self));
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if (ssc->ssc_ih == NULL) {
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aprint_error_dev(self, "failed to establish interrupt on %s\n",
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intrstr);
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}
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aprint_normal_dev(self, "interrupting on %s\n", intrstr);
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}
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/*
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* Console support
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*/
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static int
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dw_apb_uart_console_match(int phandle)
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{
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return of_compatible_match(phandle, compat_data);
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}
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static void
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dw_apb_uart_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
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{
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const int phandle = faa->faa_phandle;
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bus_space_tag_t bst = faa->faa_bst;
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bus_space_handle_t dummy_bsh;
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struct com_regs regs;
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bus_addr_t addr;
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tcflag_t flags;
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u_int reg_shift, reg_iowidth;
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int speed;
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fdtbus_get_reg(phandle, 0, &addr, NULL);
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speed = fdtbus_get_stdout_speed();
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if (speed < 0)
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speed = 115200; /* default */
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flags = fdtbus_get_stdout_flags();
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if (of_getprop_uint32(phandle, "reg-shift", ®_shift)) {
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/* missing or bad reg-shift property, assume 2 */
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reg_shift = 2;
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}
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if (of_getprop_uint32(phandle, "reg-io-width", ®_iowidth)) {
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/* missing or bad reg-io-width property, assume 1 */
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reg_iowidth = 1;
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}
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memset(&dummy_bsh, 0, sizeof(dummy_bsh));
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com_init_regs_stride_width(®s, bst, dummy_bsh, addr, reg_shift, reg_iowidth);
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if (comcnattach1(®s, speed, uart_freq, COM_TYPE_DW_APB, flags))
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panic("Cannot initialize dw-apb-uart console");
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}
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static const struct fdt_console dw_apb_uart_console = {
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.match = dw_apb_uart_console_match,
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.consinit = dw_apb_uart_console_consinit,
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};
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FDT_CONSOLE(dw_apb_uart, &dw_apb_uart_console);
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