283 lines
9.9 KiB
C
283 lines
9.9 KiB
C
/* $NetBSD: param.h,v 1.62 2021/05/31 14:38:56 simonb Exp $ */
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/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This software was developed by the Computer Systems Engineering group
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* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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* contributed to Berkeley.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Lawrence Berkeley Laboratory.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)param.h 8.1 (Berkeley) 6/11/93
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*/
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/*
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* Copyright (c) 1996-2002 Eduardo Horvath
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#if defined(_KERNEL_OPT)
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#include "opt_param.h"
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#include "opt_sparc_arch.h"
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#endif
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#ifdef __arch64__
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#define _MACHINE sparc64
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#define MACHINE "sparc64"
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#define _MACHINE_ARCH sparc64
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#define MACHINE_ARCH "sparc64"
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#define MID_MACHINE MID_SPARC64
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#else
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#define _MACHINE sparc
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#define MACHINE "sparc"
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#define _MACHINE_ARCH sparc
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#define MACHINE_ARCH "sparc"
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#define MID_MACHINE MID_SPARC
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#endif
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#ifdef _KERNEL /* XXX */
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#ifndef _LOCORE /* XXX */
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#include <machine/cpu.h> /* XXX */
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#endif /* XXX */
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#endif /* XXX */
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#define ALIGNBYTES32 0x7
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#define ALIGNBYTES64 0xf
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#define ALIGN32(p) (((u_long)(p) + ALIGNBYTES32) & ~ALIGNBYTES32)
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/*
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* The following variables are always defined and initialized (in locore)
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* so independently compiled modules (e.g. LKMs) can be used irrespective
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* of the `options SUN4?' combination a particular kernel was configured with.
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* See also the definitions of NBPG, PGOFSET and PGSHIFT below.
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*/
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#if (defined(_KERNEL) || defined(_STANDALONE)) && !defined(_LOCORE)
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extern int nbpg, pgofset, pgshift;
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#endif
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#ifdef __arch64__
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#ifdef SUN4V
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#define MAXCPUS 256
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#endif
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/* We get stack overflows w/8K stacks in 64-bit mode */
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#define SSIZE 2 /* initial stack size in pages */
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#else
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#define SSIZE 2
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#endif
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#define USPACE (SSIZE*8192)
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/*
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* Here are all the magic kernel virtual addresses and how they're allocated.
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*
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* First, the PROM is usually a fixed-sized block from 0x00000000f0000000 to
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* 0x00000000f0100000. It also uses some space around 0x00000000fff00000 to
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* map in device registers. The rest is pretty much ours to play with.
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*
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* The kernel starts at KERNBASE. Here's the layout. We use macros to set
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* the addresses so we can relocate everything easily. We use 4MB locked TTEs
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* to map in the kernel text and data segments. Any extra pages are recycled,
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* so they can potentially be double-mapped. This shouldn't really be a
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* problem since they're unused, but wild pointers can cause silent data
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* corruption if they are in those segments.
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*
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* 0x0000000000000000: 64K NFO page zero
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* 0x0000000000010000: Userland or PROM
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* KERNBASE: 4MB (or multiple thereof) kernel text and read only
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* data. This is mapped in the ITLB and
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* Read-Only in the DTLB
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* KERNBASE+0x400000: 4MB kernel data and BSS -- not in ITLB
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* Contains context table, kernel pmap,
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* and other important structures.
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* KERNBASE+0x800000: Unmapped page -- redzone
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* KERNBASE+0x802000: Process 0 stack and u-area
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* KERNBASE+0x806000: 2 pages for pmap_copy_page and /dev/mem
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*
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* For 32 bit kernels:
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* KERNBASE+0x80a000: Start of kernel VA segment
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* KERNEND: End of kernel VA segment
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*
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* KERNEND+0x02000: Auxreg_va (unused?)
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* KERNEND+0x04000: TMPMAP_VA (unused?)
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* KERNEND+0x06000: message buffer.
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* KERNEND+0x010000: INTSTACK -- per-cpu 64K locked TTE
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* Contains interrupt stack (32KB), cpu_info structure
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* and panicstack (32KB)
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* KERNEND+0x018000: CPUINFO_VA -- cpu_info structure
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* KERNEND+0x020000: unmapped space (top of panicstack)
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* KERNEND+0x022000: IODEV_BASE -- begin mapping IO devices here.
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* 0x00000000f0000000: IODEV_END -- end of device mapping space.
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*
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* For 64 bit kernels:
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* 0x100000000: Start of kernel VA segment (theoretically upto
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* the VA hole)
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*
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*/
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#define KERNBASE 0x001000000 /* start of kernel virtual space */
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#define KERNEND 0x0e0000000 /* end of kernel virtual space */
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#define _MAXNBPG 8192 /* fixed VAs, independent of actual NBPG */
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#define MSGBUF_VA ( KERNEND + _MAXNBPG) /* 1 page REDZONE */
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/*
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* Maximum message buffer size is 248k.
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* Here's the location of the interrupt stack and CPU structure.
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*/
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#define INTSTACK ( KERNEND + 32*_MAXNBPG)
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#define EINTSTACK ( INTSTACK + 4*_MAXNBPG)
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#define CPUINFO_VA ( EINTSTACK )
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#define PANICSTACK ( INTSTACK + 8*_MAXNBPG)
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#define IODEV_BASE ( INTSTACK + 9*_MAXNBPG) /* 1 page redzone */
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#define IODEV_END 0x0f0000000UL /* ~16 MB of iospace */
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/*
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* Constants related to network buffer management.
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* MCLBYTES must be no larger than NBPG (the software page size), and,
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* on machines that exchange pages of input or output buffers with mbuf
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* clusters (MAPPED_MBUFS), MCLBYTES must also be an integral multiple
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* of the hardware page size.
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*/
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#define MSIZE 256 /* size of an mbuf */
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#ifndef MCLSHIFT
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#define MCLSHIFT 11 /* convert bytes to m_buf clusters */
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/* 2K cluster can hold Ether frame */
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#endif /* MCLSHIFT */
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#define MCLBYTES (1 << MCLSHIFT) /* size of a m_buf cluster */
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#if !defined (MSGBUFSIZE) /* options MSGBUFSIZE=integer */
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#define MSGBUFSIZE (4 * NBPG)
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#else
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#if INTSTACK - MSGBUF_VA - MSGBUFSIZE < 0
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#error MSGBUFSIZE is too large
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#endif
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#endif
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/*
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* Minimum size of the kernel kmem_arena in PAGE_SIZE-sized
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* logical pages.
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* For 32bit kernels:
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* Maximum of 2.5GB on sparc64 (it must fit into KERNEND - KERNBASE, and also
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* leave space in the kernel_map for other allocations).
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* For 64bit kernels:
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* Unlimited. (Practically there is a limit, we use VA starting at 4GB upto
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* the VA-hole, but let us call this unlimited for now.)
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*/
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#define NKMEMPAGES_MIN_DEFAULT ((64 * 1024 * 1024) >> PAGE_SHIFT)
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#ifdef __arch64__
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#define NKMEMPAGES_MAX_UNLIMITED
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#else
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#undef NKMEMPAGES_MAX_UNLIMITED
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#define NKMEMPAGES_MAX_DEFAULT ((2048UL * 1024 * 1024) >> PAGE_SHIFT)
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#endif
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#ifdef _KERNEL
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#ifndef _LOCORE
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#ifndef __HIDE_DELAY
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extern void delay(unsigned int);
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#define DELAY(n) delay(n)
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#endif /* __HIDE_DELAY */
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/* Keep this a const so compiler optimization is done */
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extern const int cputyp;
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#if defined (SUN4US) || defined (SUN4V)
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#define CPU_ISSUN4U (cputyp == CPU_SUN4U)
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#define CPU_ISSUN4US (cputyp == CPU_SUN4US)
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#define CPU_ISSUN4V (cputyp == CPU_SUN4V)
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#else
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#define CPU_ISSUN4U (1)
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#define CPU_ISSUN4US (0)
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#define CPU_ISSUN4V (0)
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#endif
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#endif /* _LOCORE */
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#endif /* _KERNEL */
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/*
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* Values for the cputyp variable.
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*/
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#define CPU_SUN4 0
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#define CPU_SUN4C 1
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#define CPU_SUN4M 2
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#define CPU_SUN4U 3
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#define CPU_SUN4US 4
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#define CPU_SUN4V 5
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/*
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* Shorthand CPU-type macros. Enumerate all eight cases.
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* Let compiler optimize away code conditional on constants.
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*
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* On a sun4 machine, the page size is 8192, while on a sun4c and sun4m
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* it is 4096. Therefore, in the (SUN4 && (SUN4C || SUN4M)) cases below,
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* NBPG, PGOFSET and PGSHIFT are defined as variables which are initialized
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* early in locore.s after the machine type has been detected.
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*
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* Note that whenever the macros defined below evaluate to expressions
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* involving variables, the kernel will perform slightly worse due to the
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* extra memory references they'll generate.
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*/
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#define CPU_ISSUN4M (0)
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#define CPU_ISSUN4C (0)
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#define CPU_ISSUN4 (0)
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#define PGSHIFT 13 /* log2(NBPG) */
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#define NBPG (1<<PGSHIFT) /* bytes/page */
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#define PGOFSET (NBPG-1) /* byte offset into page */
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#define PCI_MAGIC_IO_RANGE 0x100000000LL
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