187 lines
6.3 KiB
C
187 lines
6.3 KiB
C
/* $NetBSD: elf_support.h,v 1.1 2018/03/29 13:23:40 joerg Exp $ */
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/*-
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* Copyright (c) 2000 Eduardo Horvath.
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* Copyright (c) 2018 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SPARC64_ELF_SUPPORT_H
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#define _SPARC64_ELF_SUPPORT_H
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#ifdef __arch64__
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/*
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* Create a jump to the location `target` starting at `where`.
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* This requires up to 6 instructions.
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* The first instruction is written last as it replaces a branch
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* in the PLT during lazy binding.
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* The resulting code can trash %g1 and %g5.
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*/
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static inline void
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sparc_write_branch(void *where_, void *target)
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{
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const unsigned int BAA = 0x30800000U; /* ba,a (offset / 4) */
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const unsigned int SETHI = 0x03000000U; /* sethi %hi(0), %g1 */
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const unsigned int JMP = 0x81c06000U; /* jmpl %g1+%lo(0), %g0 */
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const unsigned int OR = 0x82106000U; /* or %g1, 0, %g1 */
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const unsigned int XOR = 0x82186000U; /* xor %g1, 0, %g1 */
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const unsigned int MOV71 = 0x8213e000U; /* or %o7, 0, %g1 */
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const unsigned int MOV17 = 0x9e106000U; /* or %g1, 0, %o7 */
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const unsigned int CALL = 0x40000000U; /* call 0 */
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const unsigned int SLLX = 0x83287000U; /* sllx %g1, 0, %g1 */
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const unsigned int NEG = 0x82200001U; /* neg %g1 */
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const unsigned int SETHIG5 = 0x0b000000U; /* sethi %hi(0), %g5 */
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const unsigned int ORG5 = 0x82104005U; /* or %g1, %g5, %g1 */
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unsigned int *where = (unsigned int *)where_;
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unsigned long value = (unsigned long)target;
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unsigned long offset = value - (unsigned long)where;
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#define HIVAL(v, s) (((v) >> (s)) & 0x003fffffU)
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#define LOVAL(v, s) (((v) >> (s)) & 0x000003ffU)
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if (offset + 0x800000 <= 0x7ffffc) {
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/* Displacement is within 8MB, use a direct branch. */
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where[0] = BAA | ((offset >> 2) & 0x3fffff);
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__asm volatile("iflush %0+0" : : "r" (where));
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return;
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}
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if (value <= 0xffffffffUL) {
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/*
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* The absolute address is a 32bit value.
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* This can be encoded as:
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* sethi %hi(value), %g1
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* jmp %g1+%lo(value)
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*/
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where[1] = JMP | LOVAL(value, 0);
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__asm volatile("iflush %0+4" : : "r" (where));
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where[0] = SETHI | HIVAL(value, 10);
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__asm volatile("iflush %0+0" : : "r" (where));
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return;
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}
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if (value >= 0xffffffff00000000UL) {
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/*
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* The top 32bit address range can be encoded as:
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* sethi %hix(addr), %g1
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* xor %g1, %lox(addr), %g1
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* jmp %g1
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*/
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where[2] = JMP;
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where[1] = XOR | (value & 0x00003ff) | 0x1c00;
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__asm volatile("iflush %0+4" : : "r" (where));
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__asm volatile("iflush %0+8" : : "r" (where));
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where[0] = SETHI | HIVAL(~value, 10);
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__asm volatile("iflush %0+0" : : "r" (where));
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return;
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}
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if ((offset + 4) + 0x80000000UL <= 0x100000000UL) {
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/*
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* Displacement of the second instruction is within
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* +-2GB. This can use a direct call instruction:
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* mov %o7, %g1
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* call (value - .)
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* mov %g1, %o7
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*/
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where[1] = CALL | ((-(offset + 4)>> 2) & 0x3fffffffU);
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where[2] = MOV17;
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__asm volatile("iflush %0+4" : : "r" (where));
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__asm volatile("iflush %0+8" : : "r" (where));
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where[0] = MOV71;
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__asm volatile("iflush %0+0" : : "r" (where));
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return;
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}
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if (value < 0x100000000000UL) {
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/*
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* The absolute address is a 44bit value.
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* This can be encoded as:
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* sethi %h44(addr), %g1
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* or %g1, %m44(addr), %g1
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* sllx %g1, 12, %g1
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* jmp %g1+%l44(addr)
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*/
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where[1] = OR | (((value) >> 12) & 0x00001fff);
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where[2] = SLLX | 12;
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where[3] = JMP | LOVAL(value, 0);
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__asm volatile("iflush %0+4" : : "r" (where));
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__asm volatile("iflush %0+8" : : "r" (where));
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__asm volatile("iflush %0+12" : : "r" (where));
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where[0] = SETHI | HIVAL(value, 22);
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__asm volatile("iflush %0+0" : : "r" (where));
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return;
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}
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if (value > 0xfffff00000000000UL) {
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/*
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* The top 44bit address range can be encoded as:
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* sethi %hi((-addr)>>12), %g1
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* or %g1, %lo((-addr)>>12), %g1
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* neg %g1
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* sllx %g1, 12, %g1
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* jmp %g1+(addr&0x0fff)
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*/
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unsigned long neg = (-value)>>12;
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where[1] = OR | (LOVAL(neg, 0)+1);
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where[2] = NEG;
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where[3] = SLLX | 12;
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where[4] = JMP | (value & 0x0fff);
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__asm volatile("iflush %0+4" : : "r" (where));
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__asm volatile("iflush %0+8" : : "r" (where));
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__asm volatile("iflush %0+12" : : "r" (where));
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__asm volatile("iflush %0+16" : : "r" (where));
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where[0] = SETHI | HIVAL(neg, 10);
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__asm volatile("iflush %0+0" : : "r" (where));
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return;
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}
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/*
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* The general case of a 64bit address is encoded as:
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* sethi %hh(addr), %g1
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* sethi %lm(addr), %g5
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* or %g1, %hm(addr), %g1
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* sllx %g1, 32, %g1
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* or %g1, %g5, %g1
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* jmp %g1+%lo(addr)
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*/
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where[1] = SETHIG5 | HIVAL(value, 10);
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where[2] = OR | LOVAL(value, 32);
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where[3] = SLLX | 32;
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where[4] = ORG5;
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where[5] = JMP | LOVAL(value, 0);
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__asm volatile("iflush %0+4" : : "r" (where));
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__asm volatile("iflush %0+8" : : "r" (where));
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__asm volatile("iflush %0+12" : : "r" (where));
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__asm volatile("iflush %0+16" : : "r" (where));
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__asm volatile("iflush %0+20" : : "r" (where));
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where[0] = SETHI | HIVAL(value, 42);
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__asm volatile("iflush %0+0" : : "r" (where));
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#undef HIVAL
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#undef LOVAL
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}
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#else
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#include <sparc/elf_support.h>
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#endif
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#endif
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