304 lines
10 KiB
C
304 lines
10 KiB
C
/* $NetBSD: bus_defs.h,v 1.5 2019/09/23 16:17:58 skrll Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1997-1999, 2001 Eduardo E. Horvath. All rights reserved.
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* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SPARC64_BUS_DEFS_H_
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#define _SPARC64_BUS_DEFS_H_
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#include <machine/types.h>
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#include <machine/ctlreg.h>
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/*
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* Debug hooks
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*/
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#define BSDB_ACCESS 0x01
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#define BSDB_MAP 0x02
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/*
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* UPA and SBUS spaces are non-cached and big endian
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* (except for RAM and PROM)
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*
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* PCI spaces are non-cached and little endian
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*/
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enum bus_type {
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UPA_BUS_SPACE,
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SBUS_BUS_SPACE,
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PCI_CONFIG_BUS_SPACE,
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PCI_IO_BUS_SPACE,
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PCI_MEMORY_BUS_SPACE,
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LAST_BUS_SPACE
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};
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/* For backwards compatibility */
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#define SPARC_BUS_SPACE UPA_BUS_SPACE
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#define __BUS_SPACE_HAS_STREAM_METHODS 1
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/*
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* Bus address and size types
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*/
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typedef struct _bus_space_handle {
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uint64_t _ptr;
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uint8_t _asi;
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uint8_t _sasi;
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} bus_space_handle_t;
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typedef enum bus_type bus_type_t;
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typedef uint64_t bus_addr_t;
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typedef uint64_t bus_size_t;
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#define PRIxBUSADDR PRIx64
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#define PRIxBUSSIZE PRIx64
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#define PRIuBUSSIZE PRIu64
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/*
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* XXXX -- convert prom virtual address to bus_space_handle_t
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*/
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#define sparc_promaddr_to_handle(tag, promaddr, hp) \
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do { \
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(hp)->_ptr = (uint64_t)(promaddr); \
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(hp)->_asi = ASI_PRIMARY; \
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(hp)->_sasi = ASI_PRIMARY; \
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} while (0)
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/* For buses which have an iospace. */
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#define BUS_ADDR_IOSPACE(x) ((x)>>32)
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#define BUS_ADDR_PADDR(x) ((x)&0xffffffff)
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#define BUS_ADDR(io, pa) ((((bus_addr_t)io)<<32)|(pa))
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/*
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* Access methods for bus resources and address space.
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*/
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typedef struct sparc_bus_space_tag *bus_space_tag_t;
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struct sparc_bus_space_tag {
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void *cookie;
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bus_space_tag_t parent;
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/*
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* Windows onto the parent bus that this tag maps. If ranges
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* is non-NULL, the address will be translated, and recursively
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* mapped via the parent tag.
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*/
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struct openprom_range *ranges;
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int nranges;
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int type;
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int (*sparc_bus_alloc)(bus_space_tag_t, bus_addr_t,
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bus_addr_t, bus_size_t, bus_size_t, bus_size_t, int,
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bus_addr_t *, bus_space_handle_t *);
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void (*sparc_bus_free)(bus_space_tag_t, bus_space_handle_t,
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bus_size_t);
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int (*sparc_bus_map)(bus_space_tag_t, bus_addr_t, bus_size_t,
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int, vaddr_t, bus_space_handle_t *);
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int (*sparc_bus_unmap)(bus_space_tag_t, bus_space_handle_t,
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bus_size_t);
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int (*sparc_bus_subregion)(bus_space_tag_t,
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bus_space_handle_t, bus_size_t, bus_size_t,
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bus_space_handle_t *);
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paddr_t (*sparc_bus_mmap)(bus_space_tag_t, bus_addr_t, off_t,
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int, int);
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void *(*sparc_intr_establish)(bus_space_tag_t, int, int,
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int (*)(void *), void *, void (*)(void));
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};
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/* flags for bus space map functions */
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#define BUS_SPACE_MAP_READONLY 0x0008
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#define BUS_SPACE_MAP_BUS1 0x0100
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#define BUS_SPACE_MAP_BUS2 0x0200
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#define BUS_SPACE_MAP_BUS3 0x0400
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#define BUS_SPACE_MAP_BUS4 0x0800
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#define BUS_SPACE_MAP_LITTLE 0x1000
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/* sparc uses this, it's not supposed to do anything on sparc64 */
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#define BUS_SPACE_MAP_LARGE 0
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/* flags for bus_space_barrier() */
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#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
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#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
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#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
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/*
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* Flags used in various bus DMA methods.
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*/
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#define BUS_DMA_NOWRITE BUS_DMA_BUS1
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#define BUS_DMA_DVMA BUS_DMA_BUS2 /* Don't bother with alignment */
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/* Forwards needed by prototypes below. */
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struct mbuf;
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struct uio;
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/*
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* Operations performed by bus_dmamap_sync().
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*/
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#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
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#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
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#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
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#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
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typedef struct sparc_bus_dma_tag *bus_dma_tag_t;
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typedef struct sparc_bus_dmamap *bus_dmamap_t;
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#define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
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/*
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* bus_dma_segment_t
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*
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* Describes a single contiguous DMA transaction. Values
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* are suitable for programming into DMA registers.
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*/
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struct sparc_bus_dma_segment {
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bus_addr_t ds_addr; /* DVMA address */
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bus_size_t ds_len; /* length of transfer */
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bus_size_t _ds_boundary; /* don't cross this */
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bus_size_t _ds_align; /* align to this */
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void *_ds_mlist; /* XXX - dmamap_alloc'ed pages */
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};
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typedef struct sparc_bus_dma_segment bus_dma_segment_t;
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/*
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* bus_dma_tag_t
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*
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* A machine-dependent opaque type describing the implementation of
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* DMA for a given bus.
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*/
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struct sparc_bus_dma_tag {
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void *_cookie; /* cookie used in the guts */
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struct sparc_bus_dma_tag* _parent;
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/*
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* DMA mapping methods.
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*/
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int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
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bus_size_t, bus_size_t, int, bus_dmamap_t *);
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void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
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int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
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bus_size_t, struct proc *, int);
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int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
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struct mbuf *, int);
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int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
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struct uio *, int);
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int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
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bus_dma_segment_t *, int, bus_size_t, int);
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void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
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void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
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bus_addr_t, bus_size_t, int);
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/*
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* DMA memory utility functions.
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*/
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int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
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bus_size_t, bus_dma_segment_t *, int, int *, int);
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void (*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int);
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int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
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int, size_t, void **, int);
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void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
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paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
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int, off_t, int, int);
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};
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/*
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* bus_dmamap_t
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*
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* Describes a DMA mapping.
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*/
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struct sparc_bus_dmamap {
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/*
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* PRIVATE MEMBERS: not for use by machine-independent code.
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*/
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bus_addr_t _dm_dvmastart; /* start and size of allocated */
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bus_size_t _dm_dvmasize; /* DVMA segment for this map. */
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bus_size_t _dm_size; /* largest DMA transfer mappable */
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bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
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bus_size_t _dm_boundary; /* don't cross this */
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int _dm_segcnt; /* number of segs this map can map */
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int _dm_flags; /* misc. flags */
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#define _DM_TYPE_LOAD 0
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#define _DM_TYPE_SEGS 1
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#define _DM_TYPE_UIO 2
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#define _DM_TYPE_MBUF 3
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int _dm_type; /* type of mapping: raw, uio, mbuf, etc */
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void *_dm_source; /* source mbuf, uio, etc. needed for unload */
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void *_dm_cookie; /* cookie for bus-specific functions */
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/*
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* PUBLIC MEMBERS: these are used by machine-independent code.
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*/
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bus_size_t dm_maxsegsz; /* largest possible segment */
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bus_size_t dm_mapsize; /* size of the mapping */
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int dm_nsegs; /* # valid segments in mapping */
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bus_dma_segment_t dm_segs[1]; /* segments; variable length */
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};
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#endif /* _SPARC64_BUS_DEFS_H_ */
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