260 lines
9.6 KiB
C
260 lines
9.6 KiB
C
/* $NetBSD: pmap_motorola.h,v 1.43 2023/12/31 21:59:24 thorpej Exp $ */
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/*
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* Copyright (c) 1991, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)pmap.h 8.1 (Berkeley) 6/10/93
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*/
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/*
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* Copyright (c) 1987 Carnegie-Mellon University
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)pmap.h 8.1 (Berkeley) 6/10/93
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*/
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#ifndef _M68K_PMAP_MOTOROLA_H_
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#define _M68K_PMAP_MOTOROLA_H_
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#ifdef _KERNEL_OPT
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#include "opt_m68k_arch.h"
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#endif
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#include <machine/cpu.h>
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#include <machine/pte.h>
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/*
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* Pmap stuff
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*/
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struct pmap {
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pt_entry_t *pm_ptab; /* KVA of page table */
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st_entry_t *pm_stab; /* KVA of segment table */
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u_int pm_stfree; /* 040: free lev2 blocks */
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st_entry_t *pm_stpa; /* 040: ST phys addr */
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uint16_t pm_sref; /* segment table ref count */
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u_int pm_count; /* pmap reference count */
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struct pmap_statistics pm_stats; /* pmap statistics */
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int pm_ptpages; /* more stats: PT pages */
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};
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/*
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* Root Pointer attributes for Supervisor and User modes.
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*
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* Supervisor:
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* - No index limit (Lower limit == 0)
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* - Points to Short format descriptor table.
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* - Shared Globally
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*
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* User:
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* - No index limit (Lower limit == 0)
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* - Points to Short format descriptor table.
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*/
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#define MMU51_SRP_BITS (DTE51_LOWER | DTE51_SG | DT51_SHORT)
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#define MMU51_CRP_BITS (DTE51_LOWER | DT51_SHORT)
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/*
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* MMU specific segment values
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*
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* We are using following segment layout in m68k pmap_motorola.c:
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* 68020/030 4KB/page: l1,l2,page == 10,10,12 (%tc = 0x82c0aa00)
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* 68020/030 8KB/page: l1,l2,page == 8,11,13 (%tc = 0x82d08b00)
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* 68040/060 4KB/page: l1,l2,l3,page == 7,7,6,12 (%tc = 0x8000)
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* 68040/060 8KB/page: l1,l2,l3,page == 7,7,5,13 (%tc = 0xc000)
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*
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* 68020/030 l2 size is chosen per NPTEPG, a number of page table entries
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* per page, to use one whole page for PTEs per one segment table entry,
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* and maybe also because 68020 HP MMU machines use similar structures.
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*
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* 68040/060 layout is defined by hardware design and not configurable,
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* as defined in <m68k/pte_motorola.h>.
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*
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* Even on 68040/060, we still appropriate 2-level ste-pte pmap structures
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* for 68020/030 (derived from 4.4BSD/hp300) to handle 040's 3-level MMU.
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* TIA_SIZE and TIB_SIZE are used to represent such pmap structures and
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* they are also referred on 040/060.
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*
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* NBSEG and SEGOFSET are used to check l2 STE of the specified VA,
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* so they have different values between 020/030 and 040/060.
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*/
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/* 8KB / 4KB */
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#define TIB_SHIFT (PGSHIFT - 2) /* 11 / 10 */
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#define TIB_SIZE (1U << TIB_SHIFT) /* 2048 / 1024 */
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#define TIA_SHIFT (32 - TIB_SHIFT - PGSHIFT) /* 8 / 10 */
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#define TIA_SIZE (1U << TIA_SHIFT) /* 256 / 1024 */
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#define MMU51_TCR_BITS (TCR51_E | TCR51_SRE | \
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__SHIFTIN(PGSHIFT, TCR51_PS) | \
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__SHIFTIN(TIA_SHIFT, TCR51_TIA) | \
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__SHIFTIN(TIB_SHIFT, TCR51_TIB))
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#define MMU40_TCR_BITS (TCR40_E | \
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__SHIFTIN(PGSHIFT - 12, TCR40_P))
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#define SEGSHIFT (TIB_SHIFT + PGSHIFT) /* 24 / 22 */
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#define NBSEG30 (1U << SEGSHIFT)
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#define NBSEG40 (1U << SG4_SHIFT2)
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#if ( defined(M68020) || defined(M68030)) && \
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(!defined(M68040) && !defined(M68060))
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#define NBSEG NBSEG30
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#elif ( defined(M68040) || defined(M68060)) && \
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(!defined(M68020) && !defined(M68030))
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#define NBSEG NBSEG40
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#else
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#define NBSEG ((mmutype == MMU_68040) ? NBSEG40 : NBSEG30)
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#endif
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#define SEGOFSET (NBSEG - 1) /* byte offset into segment */
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#define m68k_round_seg(x) ((((vaddr_t)(x)) + SEGOFSET) & ~SEGOFSET)
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#define m68k_trunc_seg(x) ((vaddr_t)(x) & ~SEGOFSET)
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#define m68k_seg_offset(x) ((vaddr_t)(x) & SEGOFSET)
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/*
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* On the 040, we keep track of which level 2 blocks are already in use
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* with the pm_stfree mask. Bits are arranged from LSB (block 0) to MSB
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* (block 31). For convenience, the level 1 table is considered to be
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* block 0.
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*
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* MAX[KU]L2SIZE control how many pages of level 2 descriptors are allowed
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* for the kernel and users.
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* 16 or 8 implies only the initial "segment table" page is used,
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* i.e. it means PAGE_SIZE / (SG4_LEV1SIZE * sizeof(st_entry_t)).
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* WARNING: don't change MAXUL2SIZE unless you can allocate
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* physically contiguous pages for the ST in pmap_motorola.c!
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*/
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#define MAXKL2SIZE 32
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#if PAGE_SIZE == 8192 /* NBPG / (SG4_LEV1SIZE * sizeof(st_entry_t)) */
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#define MAXUL2SIZE 16
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#else
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#define MAXUL2SIZE 8
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#endif
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#define l2tobm(n) (1U << (n))
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#define bmtol2(n) (ffs(n) - 1)
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/*
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* For each struct vm_page, there is a list of all currently valid virtual
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* mappings of that page. An entry is a pv_entry, the list is pv_table.
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*/
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struct pv_entry {
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struct pv_entry *pv_next; /* next pv_entry */
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struct pmap *pv_pmap; /* pmap where mapping lies */
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vaddr_t pv_va; /* virtual address for mapping */
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st_entry_t *pv_ptste; /* non-zero if VA maps a PT page */
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struct pmap *pv_ptpmap; /* if pv_ptste, pmap for PT page */
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};
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extern struct pv_header *pv_table; /* array of entries, one per page */
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#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
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#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
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#define pmap_update(pmap) __nothing /* nothing (yet) */
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static __inline bool
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pmap_remove_all(struct pmap *pmap)
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{
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/* Nothing. */
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return false;
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}
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extern paddr_t Sysseg_pa;
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extern st_entry_t *Sysseg;
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extern pt_entry_t *Sysmap, *Sysptmap;
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#define SYSMAP_VA VM_MAX_KERNEL_ADDRESS
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extern vsize_t Sysptsize;
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extern vsize_t mem_size;
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extern vaddr_t virtual_avail, virtual_end;
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extern u_int protection_codes[];
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#if defined(M68040) || defined(M68060)
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extern u_int protostfree;
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#endif
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#ifdef CACHE_HAVE_VAC
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extern u_int pmap_aliasmask;
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#endif
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extern char *vmmap; /* map for mem, dumps, etc. */
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extern void *CADDR1, *CADDR2;
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extern void *msgbufaddr;
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/* for lwp0 uarea initialization after MMU enabled */
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extern vaddr_t lwp0uarea;
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void pmap_bootstrap_finalize(void);
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vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, int);
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void pmap_procwr(struct proc *, vaddr_t, size_t);
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#define PMAP_NEED_PROCWR
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#ifdef CACHE_HAVE_VAC
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void pmap_prefer(vaddr_t, vaddr_t *);
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#define PMAP_PREFER(foff, vap, sz, td) pmap_prefer((foff), (vap))
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#endif
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void _pmap_set_page_cacheable(struct pmap *, vaddr_t);
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void _pmap_set_page_cacheinhibit(struct pmap *, vaddr_t);
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int _pmap_page_is_cacheable(struct pmap *, vaddr_t);
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paddr_t vtophys(vaddr_t va);
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#endif /* !_M68K_PMAP_MOTOROLA_H_ */
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