726 lines
19 KiB
C
726 lines
19 KiB
C
/* $NetBSD: mlx_pci.c,v 1.27 2018/12/09 11:14:02 jdolecek Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Andrew Doran.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1999 Michael Smith
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from FreeBSD: mlx_pci.c,v 1.4.2.4 2000/10/28 10:48:09 msmith Exp
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*/
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/*
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* PCI front-end for the mlx(4) driver.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: mlx_pci.c,v 1.27 2018/12/09 11:14:02 jdolecek Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/queue.h>
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#include <sys/callout.h>
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#include <sys/module.h>
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#include <machine/endian.h>
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#include <sys/bus.h>
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#include <dev/ic/mlxreg.h>
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#include <dev/ic/mlxio.h>
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#include <dev/ic/mlxvar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include "ioconf.h"
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static void mlx_pci_attach(device_t, device_t, void *);
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static int mlx_pci_match(device_t, cfdata_t, void *);
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static const struct mlx_pci_ident *mlx_pci_findmpi(struct pci_attach_args *);
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static int mlx_v3_submit(struct mlx_softc *, struct mlx_ccb *);
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static int mlx_v3_findcomplete(struct mlx_softc *, u_int *, u_int *);
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static void mlx_v3_intaction(struct mlx_softc *, int);
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static int mlx_v3_fw_handshake(struct mlx_softc *, int *, int *, int *);
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#ifdef MLX_RESET
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static int mlx_v3_reset(struct mlx_softc *);
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#endif
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static int mlx_v4_submit(struct mlx_softc *, struct mlx_ccb *);
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static int mlx_v4_findcomplete(struct mlx_softc *, u_int *, u_int *);
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static void mlx_v4_intaction(struct mlx_softc *, int);
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static int mlx_v4_fw_handshake(struct mlx_softc *, int *, int *, int *);
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static int mlx_v5_submit(struct mlx_softc *, struct mlx_ccb *);
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static int mlx_v5_findcomplete(struct mlx_softc *, u_int *, u_int *);
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static void mlx_v5_intaction(struct mlx_softc *, int);
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static int mlx_v5_fw_handshake(struct mlx_softc *, int *, int *, int *);
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static struct mlx_pci_ident {
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u_short mpi_vendor;
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u_short mpi_product;
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u_short mpi_subvendor;
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u_short mpi_subproduct;
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int mpi_iftype;
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} const mlx_pci_ident[] = {
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{
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PCI_VENDOR_MYLEX,
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PCI_PRODUCT_MYLEX_RAID_V2,
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0x0000,
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0x0000,
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2,
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},
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{
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PCI_VENDOR_MYLEX,
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PCI_PRODUCT_MYLEX_RAID_V3,
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0x0000,
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0x0000,
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3,
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},
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{
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PCI_VENDOR_MYLEX,
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PCI_PRODUCT_MYLEX_RAID_V4,
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0x0000,
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0x0000,
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4,
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},
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{
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PCI_VENDOR_DEC,
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PCI_PRODUCT_DEC_SWXCR,
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PCI_VENDOR_MYLEX,
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PCI_PRODUCT_MYLEX_RAID_V5,
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5,
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},
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};
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static int
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mlx_pci_rescan(device_t self, const char *attr, const int *flag)
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{
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return mlx_configure(device_private(self), 1);
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}
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CFATTACH_DECL3_NEW(mlx_pci, sizeof(struct mlx_softc),
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mlx_pci_match, mlx_pci_attach, NULL, NULL, mlx_pci_rescan, NULL, 0);
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/*
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* Try to find a `mlx_pci_ident' entry corresponding to this board.
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*/
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static const struct mlx_pci_ident *
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mlx_pci_findmpi(struct pci_attach_args *pa)
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{
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const struct mlx_pci_ident *mpi, *maxmpi;
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pcireg_t reg;
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mpi = mlx_pci_ident;
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maxmpi = mpi + sizeof(mlx_pci_ident) / sizeof(mlx_pci_ident[0]);
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for (; mpi < maxmpi; mpi++) {
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if (PCI_VENDOR(pa->pa_id) != mpi->mpi_vendor ||
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PCI_PRODUCT(pa->pa_id) != mpi->mpi_product)
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continue;
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if (mpi->mpi_subvendor == 0x0000)
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return (mpi);
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reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
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if (PCI_VENDOR(reg) == mpi->mpi_subvendor &&
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PCI_PRODUCT(reg) == mpi->mpi_subproduct)
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return (mpi);
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}
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return (NULL);
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}
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/*
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* Match a supported board.
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*/
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static int
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mlx_pci_match(device_t parent, cfdata_t cfdata, void *aux)
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{
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return (mlx_pci_findmpi(aux) != NULL);
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}
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/*
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* Attach a supported board.
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*/
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static void
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mlx_pci_attach(device_t parent, device_t self, void *aux)
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{
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struct pci_attach_args *pa;
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struct mlx_softc *mlx;
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pci_chipset_tag_t pc;
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pci_intr_handle_t ih;
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bus_space_handle_t memh, ioh;
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bus_space_tag_t memt, iot;
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pcireg_t reg;
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const char *intrstr;
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int ior, memr, i;
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const struct mlx_pci_ident *mpi;
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char intrbuf[PCI_INTRSTR_LEN];
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mlx = device_private(self);
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pa = aux;
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pc = pa->pa_pc;
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mpi = mlx_pci_findmpi(aux);
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mlx->mlx_dv = self;
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mlx->mlx_dmat = pa->pa_dmat;
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mlx->mlx_ci.ci_iftype = mpi->mpi_iftype;
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printf(": Mylex RAID (v%d interface)\n", mpi->mpi_iftype);
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/*
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* Map the PCI register window.
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*/
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memr = -1;
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ior = -1;
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for (i = 0x10; i <= 0x14; i += 4) {
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reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i);
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if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) {
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if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0)
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ior = i;
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} else {
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if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0)
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memr = i;
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}
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}
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if (memr != -1)
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if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0,
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&memt, &memh, NULL, NULL))
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memr = -1;
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if (ior != -1)
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if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0,
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&iot, &ioh, NULL, NULL))
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ior = -1;
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if (memr != -1) {
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mlx->mlx_iot = memt;
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mlx->mlx_ioh = memh;
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} else if (ior != -1) {
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mlx->mlx_iot = iot;
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mlx->mlx_ioh = ioh;
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} else {
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aprint_error_dev(self, "can't map i/o or memory space\n");
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return;
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}
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/* Enable the device. */
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reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
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reg | PCI_COMMAND_MASTER_ENABLE);
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/* Map and establish the interrupt. */
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if (pci_intr_map(pa, &ih)) {
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aprint_error_dev(self, "can't map interrupt\n");
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return;
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}
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intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
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mlx->mlx_ih = pci_intr_establish_xname(pc, ih, IPL_BIO, mlx_intr, mlx,
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device_xname(self));
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if (mlx->mlx_ih == NULL) {
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aprint_error_dev(self, "can't establish interrupt");
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if (intrstr != NULL)
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aprint_error(" at %s", intrstr);
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aprint_error("\n");
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return;
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}
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/* Select linkage based on controller interface type. */
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switch (mlx->mlx_ci.ci_iftype) {
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case 2:
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case 3:
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mlx->mlx_submit = mlx_v3_submit;
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mlx->mlx_findcomplete = mlx_v3_findcomplete;
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mlx->mlx_intaction = mlx_v3_intaction;
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mlx->mlx_fw_handshake = mlx_v3_fw_handshake;
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#ifdef MLX_RESET
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mlx->mlx_reset = mlx_v3_reset;
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#endif
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break;
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case 4:
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mlx->mlx_submit = mlx_v4_submit;
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mlx->mlx_findcomplete = mlx_v4_findcomplete;
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mlx->mlx_intaction = mlx_v4_intaction;
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mlx->mlx_fw_handshake = mlx_v4_fw_handshake;
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break;
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case 5:
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mlx->mlx_submit = mlx_v5_submit;
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mlx->mlx_findcomplete = mlx_v5_findcomplete;
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mlx->mlx_intaction = mlx_v5_intaction;
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mlx->mlx_fw_handshake = mlx_v5_fw_handshake;
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break;
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}
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mlx_init(mlx, intrstr);
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}
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/*
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* ================= V3 interface linkage =================
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*/
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/*
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* Try to give (mc) to the controller. Returns 1 if successful, 0 on
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* failure (the controller is not ready to take a command).
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*
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* Must be called at splbio or in a fashion that prevents reentry.
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*/
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static int
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mlx_v3_submit(struct mlx_softc *mlx, struct mlx_ccb *mc)
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{
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/* Ready for our command? */
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if ((mlx_inb(mlx, MLX_V3REG_IDB) & MLX_V3_IDB_FULL) == 0) {
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/* Copy mailbox data to window. */
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bus_space_write_region_1(mlx->mlx_iot, mlx->mlx_ioh,
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MLX_V3REG_MAILBOX, mc->mc_mbox, 13);
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bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh,
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MLX_V3REG_MAILBOX, 13,
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BUS_SPACE_BARRIER_WRITE);
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/* Post command. */
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mlx_outb(mlx, MLX_V3REG_IDB, MLX_V3_IDB_FULL);
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return (1);
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}
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return (0);
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}
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/*
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* See if a command has been completed, if so acknowledge its completion and
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* recover the slot number and status code.
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*
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* Must be called at splbio or in a fashion that prevents reentry.
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*/
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static int
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mlx_v3_findcomplete(struct mlx_softc *mlx, u_int *slot, u_int *status)
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{
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/* Status available? */
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if ((mlx_inb(mlx, MLX_V3REG_ODB) & MLX_V3_ODB_SAVAIL) != 0) {
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*slot = mlx_inb(mlx, MLX_V3REG_STATUS_IDENT);
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*status = mlx_inw(mlx, MLX_V3REG_STATUS);
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/* Acknowledge completion. */
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mlx_outb(mlx, MLX_V3REG_ODB, MLX_V3_ODB_SAVAIL);
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mlx_outb(mlx, MLX_V3REG_IDB, MLX_V3_IDB_SACK);
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return (1);
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}
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return (0);
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}
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/*
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* Enable/disable interrupts as requested. (No acknowledge required)
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*
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* Must be called at splbio or in a fashion that prevents reentry.
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*/
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static void
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mlx_v3_intaction(struct mlx_softc *mlx, int action)
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{
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mlx_outb(mlx, MLX_V3REG_IE, action != 0);
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}
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/*
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* Poll for firmware error codes during controller initialisation.
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*
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* Returns 0 if initialisation is complete, 1 if still in progress but no
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* error has been fetched, 2 if an error has been retrieved.
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*/
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static int
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mlx_v3_fw_handshake(struct mlx_softc *mlx, int *error, int *param1, int *param2)
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{
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u_int8_t fwerror;
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/* First time around, clear any hardware completion status. */
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if ((mlx->mlx_flags & MLXF_FW_INITTED) == 0) {
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mlx_outb(mlx, MLX_V3REG_IDB, MLX_V3_IDB_SACK);
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DELAY(1000);
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mlx->mlx_flags |= MLXF_FW_INITTED;
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}
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/* Init in progress? */
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if ((mlx_inb(mlx, MLX_V3REG_IDB) & MLX_V3_IDB_INIT_BUSY) == 0)
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return (0);
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/* Test error value. */
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fwerror = mlx_inb(mlx, MLX_V3REG_FWERROR);
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if ((fwerror & MLX_V3_FWERROR_PEND) == 0)
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return (1);
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/* Mask status pending bit, fetch status. */
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*error = fwerror & ~MLX_V3_FWERROR_PEND;
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*param1 = mlx_inb(mlx, MLX_V3REG_FWERROR_PARAM1);
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*param2 = mlx_inb(mlx, MLX_V3REG_FWERROR_PARAM2);
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/* Acknowledge. */
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mlx_outb(mlx, MLX_V3REG_FWERROR, 0);
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return (2);
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}
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#ifdef MLX_RESET
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/*
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* Reset the controller. Return non-zero on failure.
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*/
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static int
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mlx_v3_reset(struct mlx_softc *mlx)
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{
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int i;
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mlx_outb(mlx, MLX_V3REG_IDB, MLX_V3_IDB_SACK);
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delay(1000000);
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/* Wait up to 2 minutes for the bit to clear. */
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for (i = 120; i != 0; i--) {
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delay(1000000);
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if ((mlx_inb(mlx, MLX_V3REG_IDB) & MLX_V3_IDB_SACK) == 0)
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break;
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}
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if (i == 0) {
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/* ZZZ */
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printf("mlx0: SACK didn't clear\n");
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return (-1);
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}
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mlx_outb(mlx, MLX_V3REG_IDB, MLX_V3_IDB_RESET);
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/* Wait up to 5 seconds for the bit to clear. */
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for (i = 5; i != 0; i--) {
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delay(1000000);
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if ((mlx_inb(mlx, MLX_V3REG_IDB) & MLX_V3_IDB_RESET) == 0)
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break;
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}
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if (i == 0) {
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/* ZZZ */
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printf("mlx0: RESET didn't clear\n");
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return (-1);
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}
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return (0);
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}
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#endif /* MLX_RESET */
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/*
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* ================= V4 interface linkage =================
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*/
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/*
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* Try to give (mc) to the controller. Returns 1 if successful, 0 on
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* failure (the controller is not ready to take a command).
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*
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* Must be called at splbio or in a fashion that prevents reentry.
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*/
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static int
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mlx_v4_submit(struct mlx_softc *mlx, struct mlx_ccb *mc)
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{
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/* Ready for our command? */
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if ((mlx_inl(mlx, MLX_V4REG_IDB) & MLX_V4_IDB_FULL) == 0) {
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/* Copy mailbox data to window. */
|
|
bus_space_write_region_1(mlx->mlx_iot, mlx->mlx_ioh,
|
|
MLX_V4REG_MAILBOX, mc->mc_mbox, 13);
|
|
bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh,
|
|
MLX_V4REG_MAILBOX, 13,
|
|
BUS_SPACE_BARRIER_WRITE);
|
|
|
|
/* Post command. */
|
|
mlx_outl(mlx, MLX_V4REG_IDB, MLX_V4_IDB_HWMBOX_CMD);
|
|
return (1);
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* See if a command has been completed, if so acknowledge its completion and
|
|
* recover the slot number and status code.
|
|
*
|
|
* Must be called at splbio or in a fashion that prevents reentry.
|
|
*/
|
|
static int
|
|
mlx_v4_findcomplete(struct mlx_softc *mlx, u_int *slot, u_int *status)
|
|
{
|
|
|
|
/* Status available? */
|
|
if ((mlx_inl(mlx, MLX_V4REG_ODB) & MLX_V4_ODB_HWSAVAIL) != 0) {
|
|
*slot = mlx_inb(mlx, MLX_V4REG_STATUS_IDENT);
|
|
*status = mlx_inw(mlx, MLX_V4REG_STATUS);
|
|
|
|
/* Acknowledge completion. */
|
|
mlx_outl(mlx, MLX_V4REG_ODB, MLX_V4_ODB_HWMBOX_ACK);
|
|
mlx_outl(mlx, MLX_V4REG_IDB, MLX_V4_IDB_SACK);
|
|
return (1);
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Enable/disable interrupts as requested.
|
|
*
|
|
* Must be called at splbio or in a fashion that prevents reentry.
|
|
*/
|
|
static void
|
|
mlx_v4_intaction(struct mlx_softc *mlx, int action)
|
|
{
|
|
u_int32_t ier;
|
|
|
|
if (!action)
|
|
ier = MLX_V4_IE_MASK | MLX_V4_IE_DISINT;
|
|
else
|
|
ier = MLX_V4_IE_MASK & ~MLX_V4_IE_DISINT;
|
|
|
|
mlx_outl(mlx, MLX_V4REG_IE, ier);
|
|
}
|
|
|
|
/*
|
|
* Poll for firmware error codes during controller initialisation.
|
|
*
|
|
* Returns 0 if initialisation is complete, 1 if still in progress but no
|
|
* error has been fetched, 2 if an error has been retrieved.
|
|
*/
|
|
static int
|
|
mlx_v4_fw_handshake(struct mlx_softc *mlx, int *error, int *param1, int *param2)
|
|
{
|
|
u_int8_t fwerror;
|
|
|
|
/* First time around, clear any hardware completion status. */
|
|
if ((mlx->mlx_flags & MLXF_FW_INITTED) == 0) {
|
|
mlx_outl(mlx, MLX_V4REG_IDB, MLX_V4_IDB_SACK);
|
|
DELAY(1000);
|
|
mlx->mlx_flags |= MLXF_FW_INITTED;
|
|
}
|
|
|
|
/* Init in progress? */
|
|
if ((mlx_inl(mlx, MLX_V4REG_IDB) & MLX_V4_IDB_INIT_BUSY) == 0)
|
|
return (0);
|
|
|
|
/* Test error value */
|
|
fwerror = mlx_inb(mlx, MLX_V4REG_FWERROR);
|
|
if ((fwerror & MLX_V4_FWERROR_PEND) == 0)
|
|
return (1);
|
|
|
|
/* Mask status pending bit, fetch status. */
|
|
*error = fwerror & ~MLX_V4_FWERROR_PEND;
|
|
*param1 = mlx_inb(mlx, MLX_V4REG_FWERROR_PARAM1);
|
|
*param2 = mlx_inb(mlx, MLX_V4REG_FWERROR_PARAM2);
|
|
|
|
/* Acknowledge. */
|
|
mlx_outb(mlx, MLX_V4REG_FWERROR, 0);
|
|
|
|
return (2);
|
|
}
|
|
|
|
/*
|
|
* ================= V5 interface linkage =================
|
|
*/
|
|
|
|
/*
|
|
* Try to give (mc) to the controller. Returns 1 if successful, 0 on failure
|
|
* (the controller is not ready to take a command).
|
|
*
|
|
* Must be called at splbio or in a fashion that prevents reentry.
|
|
*/
|
|
static int
|
|
mlx_v5_submit(struct mlx_softc *mlx, struct mlx_ccb *mc)
|
|
{
|
|
|
|
/* Ready for our command? */
|
|
if ((mlx_inb(mlx, MLX_V5REG_IDB) & MLX_V5_IDB_EMPTY) != 0) {
|
|
/* Copy mailbox data to window. */
|
|
bus_space_write_region_1(mlx->mlx_iot, mlx->mlx_ioh,
|
|
MLX_V5REG_MAILBOX, mc->mc_mbox, 13);
|
|
bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh,
|
|
MLX_V5REG_MAILBOX, 13,
|
|
BUS_SPACE_BARRIER_WRITE);
|
|
|
|
/* Post command */
|
|
mlx_outb(mlx, MLX_V5REG_IDB, MLX_V5_IDB_HWMBOX_CMD);
|
|
return (1);
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* See if a command has been completed, if so acknowledge its completion and
|
|
* recover the slot number and status code.
|
|
*
|
|
* Must be called at splbio or in a fashion that prevents reentry.
|
|
*/
|
|
static int
|
|
mlx_v5_findcomplete(struct mlx_softc *mlx, u_int *slot, u_int *status)
|
|
{
|
|
|
|
/* Status available? */
|
|
if ((mlx_inb(mlx, MLX_V5REG_ODB) & MLX_V5_ODB_HWSAVAIL) != 0) {
|
|
*slot = mlx_inb(mlx, MLX_V5REG_STATUS_IDENT);
|
|
*status = mlx_inw(mlx, MLX_V5REG_STATUS);
|
|
|
|
/* Acknowledge completion. */
|
|
mlx_outb(mlx, MLX_V5REG_ODB, MLX_V5_ODB_HWMBOX_ACK);
|
|
mlx_outb(mlx, MLX_V5REG_IDB, MLX_V5_IDB_SACK);
|
|
return (1);
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Enable/disable interrupts as requested.
|
|
*
|
|
* Must be called at splbio or in a fashion that prevents reentry.
|
|
*/
|
|
static void
|
|
mlx_v5_intaction(struct mlx_softc *mlx, int action)
|
|
{
|
|
u_int8_t ier;
|
|
|
|
if (!action)
|
|
ier = 0xff & MLX_V5_IE_DISINT;
|
|
else
|
|
ier = 0xff & ~MLX_V5_IE_DISINT;
|
|
|
|
mlx_outb(mlx, MLX_V5REG_IE, ier);
|
|
}
|
|
|
|
/*
|
|
* Poll for firmware error codes during controller initialisation.
|
|
*
|
|
* Returns 0 if initialisation is complete, 1 if still in progress but no
|
|
* error has been fetched, 2 if an error has been retrieved.
|
|
*/
|
|
static int
|
|
mlx_v5_fw_handshake(struct mlx_softc *mlx, int *error, int *param1, int *param2)
|
|
{
|
|
u_int8_t fwerror;
|
|
|
|
/* First time around, clear any hardware completion status. */
|
|
if ((mlx->mlx_flags & MLXF_FW_INITTED) == 0) {
|
|
mlx_outb(mlx, MLX_V5REG_IDB, MLX_V5_IDB_SACK);
|
|
DELAY(1000);
|
|
mlx->mlx_flags |= MLXF_FW_INITTED;
|
|
}
|
|
|
|
/* Init in progress? */
|
|
if ((mlx_inb(mlx, MLX_V5REG_IDB) & MLX_V5_IDB_INIT_DONE) != 0)
|
|
return (0);
|
|
|
|
/* Test for error value. */
|
|
fwerror = mlx_inb(mlx, MLX_V5REG_FWERROR);
|
|
if ((fwerror & MLX_V5_FWERROR_PEND) == 0)
|
|
return (1);
|
|
|
|
/* Mask status pending bit, fetch status. */
|
|
*error = fwerror & ~MLX_V5_FWERROR_PEND;
|
|
*param1 = mlx_inb(mlx, MLX_V5REG_FWERROR_PARAM1);
|
|
*param2 = mlx_inb(mlx, MLX_V5REG_FWERROR_PARAM2);
|
|
|
|
/* Acknowledge. */
|
|
mlx_outb(mlx, MLX_V5REG_FWERROR, 0xff);
|
|
|
|
return (2);
|
|
}
|
|
|
|
MODULE(MODULE_CLASS_DRIVER, mlx_pci, "mlx,pci");
|
|
|
|
#ifdef _MODULE
|
|
/*
|
|
* XXX Don't allow ioconf.c to redefine the "struct cfdriver ld_cd"
|
|
* XXX it will be defined in the common-code module
|
|
*/
|
|
#undef CFDRIVER_DECL
|
|
#define CFDRIVER_DECL(name, class, attr)
|
|
#include "ioconf.c"
|
|
#endif
|
|
|
|
static int
|
|
mlx_pci_modcmd(modcmd_t cmd, void *opaque)
|
|
{
|
|
int error = 0;
|
|
|
|
#ifdef _MODULE
|
|
switch (cmd) {
|
|
case MODULE_CMD_INIT:
|
|
/*
|
|
* We skip over the first entry in cfdriver[] array
|
|
* since the cfdriver is attached by the common
|
|
* (non-attachment-specific) code.
|
|
*/
|
|
error = config_init_component(&cfdriver_ioconf_mlx_pci[1],
|
|
cfattach_ioconf_mlx_pci, cfdata_ioconf_mlx_pci);
|
|
break;
|
|
case MODULE_CMD_FINI:
|
|
error = config_fini_component(&cfdriver_ioconf_mlx_pci[1],
|
|
cfattach_ioconf_mlx_pci, cfdata_ioconf_mlx_pci);
|
|
break;
|
|
default:
|
|
error = ENOTTY;
|
|
break;
|
|
}
|
|
#endif
|
|
|
|
return error;
|
|
}
|