100 lines
3.5 KiB
C
100 lines
3.5 KiB
C
/* $NetBSD: if_tlvar.h,v 1.17 2015/04/13 16:33:25 riastradh Exp $ */
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/*
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* Copyright (c) 1997 Manuel Bouyer. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Texas Instruments ThunderLAN ethernet controller
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* ThunderLAN Programmer's Guide (TI Literature Number SPWU013A)
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* available from www.ti.com
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*/
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#include <sys/rndsource.h>
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#include <dev/i2c/i2cvar.h>
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struct tl_product_desc {
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u_int32_t tp_product;
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int tp_tlphymedia;
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const char *tp_desc;
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};
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struct tl_softc {
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device_t sc_dev; /* base device */
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bus_space_tag_t tl_bustag;
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bus_space_handle_t tl_bushandle; /* CSR region handle */
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bus_dma_tag_t tl_dmatag;
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const struct tl_product_desc *tl_product;
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void* tl_ih;
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struct ethercom tl_ec;
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struct callout tl_tick_ch; /* tick callout */
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struct callout tl_restart_ch; /* restart callout */
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u_int8_t tl_enaddr[ETHER_ADDR_LEN]; /* hardware address */
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struct i2c_controller sc_i2c; /* i2c controller info, for eeprom */
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mii_data_t tl_mii; /* mii bus */
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bus_dma_segment_t ctrl_segs; /* bus-dma memory for control blocks */
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int ctrl_nsegs;
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char *ctrl; /* vaddr for ctrl_segs */
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struct Rx_list *Rx_list; /* Receive and transmit lists */
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struct tl_Rx_list *hw_Rx_list; /* and assocoated hw descriptor */
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bus_dmamap_t Rx_dmamap; /* and associated DMA maps */
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struct Tx_list *Tx_list;
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struct tl_Tx_list *hw_Tx_list;
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bus_dmamap_t Tx_dmamap;
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struct Rx_list *active_Rx, *last_Rx;
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struct Tx_list *active_Tx, *last_Tx;
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struct Tx_list *Free_Tx;
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bus_dmamap_t null_dmamap; /* for small packets padding */
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#ifdef TL_PRIV_STATS
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int ierr_overr;
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int ierr_code;
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int ierr_crc;
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int ierr_nomem;
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int oerr_underr;
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int oerr_deferred;
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int oerr_coll;
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int oerr_multicoll;
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int oerr_latecoll;
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int oerr_exesscoll;
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int oerr_carrloss;
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int oerr_mcopy;
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#endif
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krndsource_t rnd_source;
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};
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#define tl_if tl_ec.ec_if
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#define tl_bpf tl_if.if_bpf
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typedef struct tl_softc tl_softc_t;
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typedef u_long ioctl_cmd_t;
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#define TL_HR_READ(sc, reg) \
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bus_space_read_4(sc->tl_bustag, sc->tl_bushandle, (reg))
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#define TL_HR_READ_BYTE(sc, reg) \
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bus_space_read_1(sc->tl_bustag, sc->tl_bushandle, (reg))
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#define TL_HR_WRITE(sc, reg, data) \
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bus_space_write_4(sc->tl_bustag, sc->tl_bushandle, (reg), (data))
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#define TL_HR_WRITE_BYTE(sc, reg, data) \
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bus_space_write_1(sc->tl_bustag, sc->tl_bushandle, (reg), (data))
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#define ETHER_MIN_TX (ETHERMIN + sizeof(struct ether_header))
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