529 lines
13 KiB
C
529 lines
13 KiB
C
/* $NetBSD: ichsmb.c,v 1.60 2018/12/10 06:23:54 jdolecek Exp $ */
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/* $OpenBSD: ichiic.c,v 1.18 2007/05/03 09:36:26 dlg Exp $ */
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/*
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* Copyright (c) 2005, 2006 Alexander Yurchenko <grange@openbsd.org>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Intel ICH SMBus controller driver.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ichsmb.c,v 1.60 2018/12/10 06:23:54 jdolecek Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/errno.h>
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#include <sys/kernel.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/ic/i82801lpcreg.h>
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#include <dev/i2c/i2cvar.h>
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#ifdef ICHIIC_DEBUG
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#define DPRINTF(x) printf x
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#else
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#define DPRINTF(x)
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#endif
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#define ICHIIC_DELAY 100
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#define ICHIIC_TIMEOUT 1
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struct ichsmb_softc {
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device_t sc_dev;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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bus_size_t sc_size;
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pci_chipset_tag_t sc_pc;
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void * sc_ih;
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int sc_poll;
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pci_intr_handle_t *sc_pihp;
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struct i2c_controller sc_i2c_tag;
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kmutex_t sc_i2c_mutex;
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struct {
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i2c_op_t op;
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void * buf;
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size_t len;
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int flags;
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volatile int error;
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} sc_i2c_xfer;
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device_t sc_i2c_device;
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};
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static int ichsmb_match(device_t, cfdata_t, void *);
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static void ichsmb_attach(device_t, device_t, void *);
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static int ichsmb_detach(device_t, int);
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static int ichsmb_rescan(device_t, const char *, const int *);
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static void ichsmb_chdet(device_t, device_t);
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static int ichsmb_i2c_acquire_bus(void *, int);
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static void ichsmb_i2c_release_bus(void *, int);
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static int ichsmb_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *,
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size_t, void *, size_t, int);
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static int ichsmb_intr(void *);
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#include "ioconf.h"
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CFATTACH_DECL3_NEW(ichsmb, sizeof(struct ichsmb_softc),
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ichsmb_match, ichsmb_attach, ichsmb_detach, NULL, ichsmb_rescan,
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ichsmb_chdet, DVF_DETACH_SHUTDOWN);
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static int
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ichsmb_match(device_t parent, cfdata_t match, void *aux)
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{
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struct pci_attach_args *pa = aux;
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if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) {
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_INTEL_6300ESB_SMB:
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case PCI_PRODUCT_INTEL_63XXESB_SMB:
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case PCI_PRODUCT_INTEL_82801AA_SMB:
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case PCI_PRODUCT_INTEL_82801AB_SMB:
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case PCI_PRODUCT_INTEL_82801BA_SMB:
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case PCI_PRODUCT_INTEL_82801CA_SMB:
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case PCI_PRODUCT_INTEL_82801DB_SMB:
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case PCI_PRODUCT_INTEL_82801E_SMB:
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case PCI_PRODUCT_INTEL_82801EB_SMB:
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case PCI_PRODUCT_INTEL_82801FB_SMB:
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case PCI_PRODUCT_INTEL_82801G_SMB:
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case PCI_PRODUCT_INTEL_82801H_SMB:
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case PCI_PRODUCT_INTEL_82801I_SMB:
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case PCI_PRODUCT_INTEL_82801JD_SMB:
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case PCI_PRODUCT_INTEL_82801JI_SMB:
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case PCI_PRODUCT_INTEL_3400_SMB:
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case PCI_PRODUCT_INTEL_6SERIES_SMB:
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case PCI_PRODUCT_INTEL_7SERIES_SMB:
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case PCI_PRODUCT_INTEL_8SERIES_SMB:
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case PCI_PRODUCT_INTEL_9SERIES_SMB:
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case PCI_PRODUCT_INTEL_100SERIES_SMB:
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case PCI_PRODUCT_INTEL_100SERIES_LP_SMB:
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case PCI_PRODUCT_INTEL_2HS_SMB:
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case PCI_PRODUCT_INTEL_3HS_SMB:
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case PCI_PRODUCT_INTEL_CORE4G_M_SMB:
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case PCI_PRODUCT_INTEL_CORE5G_M_SMB:
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case PCI_PRODUCT_INTEL_BAYTRAIL_PCU_SMB:
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case PCI_PRODUCT_INTEL_BSW_PCU_SMB:
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case PCI_PRODUCT_INTEL_APL_SMB:
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case PCI_PRODUCT_INTEL_GLK_SMB:
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case PCI_PRODUCT_INTEL_C600_SMBUS:
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case PCI_PRODUCT_INTEL_C600_SMB_0:
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case PCI_PRODUCT_INTEL_C600_SMB_1:
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case PCI_PRODUCT_INTEL_C600_SMB_2:
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case PCI_PRODUCT_INTEL_C610_SMB:
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case PCI_PRODUCT_INTEL_C620_SMB:
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case PCI_PRODUCT_INTEL_C620_SMB_S:
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case PCI_PRODUCT_INTEL_EP80579_SMB:
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case PCI_PRODUCT_INTEL_DH89XXCC_SMB:
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case PCI_PRODUCT_INTEL_DH89XXCL_SMB:
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case PCI_PRODUCT_INTEL_C2000_PCU_SMBUS:
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case PCI_PRODUCT_INTEL_C3K_SMBUS_LEGACY:
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return 1;
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}
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}
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return 0;
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}
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static void
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ichsmb_attach(device_t parent, device_t self, void *aux)
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{
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struct ichsmb_softc *sc = device_private(self);
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struct pci_attach_args *pa = aux;
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pcireg_t conf;
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const char *intrstr = NULL;
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char intrbuf[PCI_INTRSTR_LEN];
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int flags;
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sc->sc_dev = self;
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sc->sc_pc = pa->pa_pc;
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pci_aprint_devinfo(pa, NULL);
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/* Read configuration */
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conf = pci_conf_read(pa->pa_pc, pa->pa_tag, LPCIB_SMB_HOSTC);
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DPRINTF(("%s: conf 0x%08x\n", device_xname(sc->sc_dev), conf));
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if ((conf & LPCIB_SMB_HOSTC_HSTEN) == 0) {
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aprint_error_dev(self, "SMBus disabled\n");
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goto out;
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}
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/* Map I/O space */
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if (pci_mapreg_map(pa, LPCIB_SMB_BASE, PCI_MAPREG_TYPE_IO, 0,
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&sc->sc_iot, &sc->sc_ioh, NULL, &sc->sc_size)) {
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aprint_error_dev(self, "can't map I/O space\n");
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goto out;
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}
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sc->sc_poll = 1;
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sc->sc_ih = NULL;
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if (conf & LPCIB_SMB_HOSTC_SMIEN) {
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/* No PCI IRQ */
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aprint_normal_dev(self, "interrupting at SMI\n");
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} else {
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/* Install interrupt handler */
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if (pci_intr_alloc(pa, &sc->sc_pihp, NULL, 0) == 0) {
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intrstr = pci_intr_string(pa->pa_pc, sc->sc_pihp[0],
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intrbuf, sizeof(intrbuf));
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sc->sc_ih = pci_intr_establish_xname(pa->pa_pc,
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sc->sc_pihp[0], IPL_BIO, ichsmb_intr, sc,
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device_xname(sc->sc_dev));
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if (sc->sc_ih != NULL) {
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aprint_normal_dev(self, "interrupting at %s\n",
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intrstr);
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sc->sc_poll = 0;
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} else {
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pci_intr_release(pa->pa_pc, sc->sc_pihp, 1);
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sc->sc_pihp = NULL;
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}
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}
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if (sc->sc_poll)
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aprint_normal_dev(self, "polling\n");
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}
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sc->sc_i2c_device = NULL;
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flags = 0;
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mutex_init(&sc->sc_i2c_mutex, MUTEX_DEFAULT, IPL_NONE);
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ichsmb_rescan(self, "i2cbus", &flags);
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out: if (!pmf_device_register(self, NULL, NULL))
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aprint_error_dev(self, "couldn't establish power handler\n");
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}
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static int
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ichsmb_rescan(device_t self, const char *ifattr, const int *flags)
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{
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struct ichsmb_softc *sc = device_private(self);
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struct i2cbus_attach_args iba;
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if (!ifattr_match(ifattr, "i2cbus"))
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return 0;
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if (sc->sc_i2c_device)
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return 0;
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/* Attach I2C bus */
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sc->sc_i2c_tag.ic_cookie = sc;
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sc->sc_i2c_tag.ic_acquire_bus = ichsmb_i2c_acquire_bus;
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sc->sc_i2c_tag.ic_release_bus = ichsmb_i2c_release_bus;
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sc->sc_i2c_tag.ic_exec = ichsmb_i2c_exec;
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memset(&iba, 0, sizeof(iba));
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iba.iba_type = I2C_TYPE_SMBUS;
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iba.iba_tag = &sc->sc_i2c_tag;
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sc->sc_i2c_device = config_found_ia(self, ifattr, &iba, iicbus_print);
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return 0;
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}
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static int
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ichsmb_detach(device_t self, int flags)
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{
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struct ichsmb_softc *sc = device_private(self);
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int error;
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if (sc->sc_i2c_device) {
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error = config_detach(sc->sc_i2c_device, flags);
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if (error)
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return error;
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}
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mutex_destroy(&sc->sc_i2c_mutex);
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if (sc->sc_ih) {
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pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
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sc->sc_ih = NULL;
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}
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if (sc->sc_pihp) {
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pci_intr_release(sc->sc_pc, sc->sc_pihp, 1);
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sc->sc_pihp = NULL;
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}
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bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_size);
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return 0;
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}
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static void
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ichsmb_chdet(device_t self, device_t child)
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{
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struct ichsmb_softc *sc = device_private(self);
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if (sc->sc_i2c_device == child)
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sc->sc_i2c_device = NULL;
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}
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static int
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ichsmb_i2c_acquire_bus(void *cookie, int flags)
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{
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struct ichsmb_softc *sc = cookie;
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if (cold)
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return 0;
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mutex_enter(&sc->sc_i2c_mutex);
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return 0;
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}
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static void
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ichsmb_i2c_release_bus(void *cookie, int flags)
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{
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struct ichsmb_softc *sc = cookie;
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if (cold)
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return;
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mutex_exit(&sc->sc_i2c_mutex);
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}
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static int
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ichsmb_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr,
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const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags)
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{
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struct ichsmb_softc *sc = cookie;
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const uint8_t *b;
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uint8_t ctl = 0, st;
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int retries;
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char fbuf[64];
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DPRINTF(("%s: exec: op %d, addr 0x%02x, cmdlen %zu, len %zu, "
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"flags 0x%02x\n", device_xname(sc->sc_dev), op, addr, cmdlen,
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len, flags));
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/* Clear status bits */
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS,
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LPCIB_SMB_HS_INTR | LPCIB_SMB_HS_DEVERR |
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LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED);
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bus_space_barrier(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, 1,
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BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
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/* Wait for bus to be idle */
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for (retries = 100; retries > 0; retries--) {
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st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS);
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if (!(st & LPCIB_SMB_HS_BUSY))
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break;
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DELAY(ICHIIC_DELAY);
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}
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#ifdef ICHIIC_DEBUG
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snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
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printf("%s: exec: st %s\n", device_xname(sc->sc_dev), fbuf);
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#endif
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if (st & LPCIB_SMB_HS_BUSY)
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return (1);
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if (cold || sc->sc_poll)
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flags |= I2C_F_POLL;
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if (!I2C_OP_STOP_P(op) || cmdlen > 1 || len > 2 ||
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(cmdlen == 0 && len > 1))
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return (1);
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/* Setup transfer */
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sc->sc_i2c_xfer.op = op;
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sc->sc_i2c_xfer.buf = buf;
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sc->sc_i2c_xfer.len = len;
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sc->sc_i2c_xfer.flags = flags;
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sc->sc_i2c_xfer.error = 0;
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/* Set slave address and transfer direction */
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_TXSLVA,
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LPCIB_SMB_TXSLVA_ADDR(addr) |
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(I2C_OP_READ_P(op) ? LPCIB_SMB_TXSLVA_READ : 0));
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b = (const uint8_t *)cmdbuf;
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if (cmdlen > 0)
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/* Set command byte */
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HCMD, b[0]);
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if (I2C_OP_WRITE_P(op)) {
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/* Write data */
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b = buf;
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if (cmdlen == 0 && len == 1)
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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LPCIB_SMB_HCMD, b[0]);
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else if (len > 0)
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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LPCIB_SMB_HD0, b[0]);
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if (len > 1)
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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LPCIB_SMB_HD1, b[1]);
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}
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/* Set SMBus command */
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if (cmdlen == 0) {
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if (len == 0)
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ctl = LPCIB_SMB_HC_CMD_QUICK;
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else
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ctl = LPCIB_SMB_HC_CMD_BYTE;
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} else if (len == 1)
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ctl = LPCIB_SMB_HC_CMD_BDATA;
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else if (len == 2)
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ctl = LPCIB_SMB_HC_CMD_WDATA;
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if ((flags & I2C_F_POLL) == 0)
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ctl |= LPCIB_SMB_HC_INTREN;
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/* Start transaction */
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ctl |= LPCIB_SMB_HC_START;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC, ctl);
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if (flags & I2C_F_POLL) {
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/* Poll for completion */
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DELAY(ICHIIC_DELAY);
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for (retries = 1000; retries > 0; retries--) {
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st = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
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LPCIB_SMB_HS);
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if ((st & LPCIB_SMB_HS_BUSY) == 0)
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break;
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DELAY(ICHIIC_DELAY);
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}
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if (st & LPCIB_SMB_HS_BUSY)
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goto timeout;
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ichsmb_intr(sc);
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} else {
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/* Wait for interrupt */
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if (tsleep(sc, PRIBIO, "iicexec", ICHIIC_TIMEOUT * hz))
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goto timeout;
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}
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if (sc->sc_i2c_xfer.error)
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return (1);
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return (0);
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timeout:
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/*
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* Transfer timeout. Kill the transaction and clear status bits.
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*/
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snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
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aprint_error_dev(sc->sc_dev,
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"exec: op %d, addr 0x%02x, cmdlen %zd, len %zd, "
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"flags 0x%02x: timeout, status %s\n",
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op, addr, cmdlen, len, flags, fbuf);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC,
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LPCIB_SMB_HC_KILL);
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DELAY(ICHIIC_DELAY);
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st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS);
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if ((st & LPCIB_SMB_HS_FAILED) == 0) {
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snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
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aprint_error_dev(sc->sc_dev, "abort failed, status %s\n",
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fbuf);
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}
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st);
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return (1);
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}
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static int
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ichsmb_intr(void *arg)
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{
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struct ichsmb_softc *sc = arg;
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uint8_t st;
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uint8_t *b;
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size_t len;
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#ifdef ICHIIC_DEBUG
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char fbuf[64];
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#endif
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/* Read status */
|
|
st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS);
|
|
if ((st & LPCIB_SMB_HS_BUSY) != 0 || (st & (LPCIB_SMB_HS_INTR |
|
|
LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED |
|
|
LPCIB_SMB_HS_SMBAL | LPCIB_SMB_HS_BDONE)) == 0)
|
|
/* Interrupt was not for us */
|
|
return (0);
|
|
|
|
#ifdef ICHIIC_DEBUG
|
|
snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
|
|
printf("%s: intr st %s\n", device_xname(sc->sc_dev), fbuf);
|
|
#endif
|
|
|
|
/* Clear status bits */
|
|
bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st);
|
|
|
|
/* Check for errors */
|
|
if (st & (LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED)) {
|
|
sc->sc_i2c_xfer.error = 1;
|
|
goto done;
|
|
}
|
|
|
|
if (st & LPCIB_SMB_HS_INTR) {
|
|
if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op))
|
|
goto done;
|
|
|
|
/* Read data */
|
|
b = sc->sc_i2c_xfer.buf;
|
|
len = sc->sc_i2c_xfer.len;
|
|
if (len > 0)
|
|
b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
|
|
LPCIB_SMB_HD0);
|
|
if (len > 1)
|
|
b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
|
|
LPCIB_SMB_HD1);
|
|
}
|
|
|
|
done:
|
|
if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0)
|
|
wakeup(sc);
|
|
return (1);
|
|
}
|
|
|
|
MODULE(MODULE_CLASS_DRIVER, ichsmb, "pci,iic");
|
|
|
|
#ifdef _MODULE
|
|
#include "ioconf.c"
|
|
#endif
|
|
|
|
static int
|
|
ichsmb_modcmd(modcmd_t cmd, void *opaque)
|
|
{
|
|
int error = 0;
|
|
|
|
switch (cmd) {
|
|
case MODULE_CMD_INIT:
|
|
#ifdef _MODULE
|
|
error = config_init_component(cfdriver_ioconf_ichsmb,
|
|
cfattach_ioconf_ichsmb, cfdata_ioconf_ichsmb);
|
|
#endif
|
|
break;
|
|
case MODULE_CMD_FINI:
|
|
#ifdef _MODULE
|
|
error = config_fini_component(cfdriver_ioconf_ichsmb,
|
|
cfattach_ioconf_ichsmb, cfdata_ioconf_ichsmb);
|
|
#endif
|
|
break;
|
|
default:
|
|
#ifdef _MODULE
|
|
error = ENOTTY;
|
|
#endif
|
|
break;
|
|
}
|
|
|
|
return error;
|
|
}
|