$NetBSD: TODO,v 1.9 2002/11/23 09:27:03 scw Exp $

TODO List For NetBSD/sh5
~~~~~~~~~~~~~~~~~~~~~~~~

In no particular order:


DONE.	Enable the cpu cache.
	There are two cache modes available in the current cpu: write-back
	and write-through. The former would be very nice. However, I don't
	want to enable caching until I'm happy enough with the stability
	of the pmap. And anyway, the pmap doesn't pay lip-service to the
	cache yet.

DONE.	Re-work the TLB invalidation code.
	This is a pain, as there is no hardware support for looking up an
	address in the TLBs. To get around this, the PTEG structure
	used to track user-space mappings contains a hint as to which group
	of four TLB slots a mapping is entered on. This information is
	maintained and updated by the TLB miss code itself. Higher level
	pmap code uses the hint to speed up TLB invalidation for user-space
	mappings (a maximum of 4 ITLB and/or 4 DTLB slots need be searched).

	Unfortunately, no such "hint" is maintained for kernel mappings
	(those in KSEG1), making KSEG1 TLB invalidations very expensive.

	Adding a "hint" field to the pmap_kernel_ipt structure would make
	things much quicker, but would use more memory... It's a question
	of trade offs.

	When I make the above change, I'd like to add a similar "hint"
	field to the PTEG structure, instead of relying on "unused" bits
	in the PTEH. This will allow the "hint" to pinpoint *exactly*
	which TLB slot in both ITLB and DTLB contains the mapping. This
	would work for both user-space and KSEG1 mappings.

DONE.	Allocate interrupt handles from a pool backed by pages from KSEG0.
	This will reduce DTLB misses at interrupt dispatch time.

DONE.	copy{in,out}() need to be re-written.
	Right now, they copy byte-at-a-time, which is not exactly fast...

DONE.	in_cksum.c needs to be replaced with an assembly code version
	which makes use of special SHmedia instructions. At first glance,
	an algorithm which makes use of the M* instructions would be
	very fast indeed.

DONE.	libkern needs sh5-specific optimised versions of key functions.
	Most of these can be used by libc too.

7.	Support for more of the on-chip peripherals, such as the DMAC.

DONE.	Test the whole lot using a 64-bit kernel/userland.

DONE.	If (8) works, try 64-bit kernel and 32-bit userland, using COMPAT32.

10.	Stress-testing of just about everything. ;-)

11.	Define a "board_info" structure, and move a whole bunch of currently
	hard-coded stuff into it. For example:

	  - CPU speed,
	  - Memory size,
	  - KSEG0 physical address,
	  - Cache details: e.g. size, number of sets/ways, line size,
	  - Cache/TLB interface routines (currently __cpu_cache*/__cpu_tlb*)
	  - etc.

12.	Support for nathan_sa when the branch is merged.

DONE.	In the pmap, we should clear the Referenced bit in the PTE (after
	saving its value in the mdpg_attrs/pvo, if it's a managed page)
	after purging the mapping from the cache. Right now, there are
	some cases where the cache can be purged several times for the
	same mapping, where only the first time is really necessary.