in interrupt controllers in struct pic, and try to keep as much
common code as possible. At the lowest (asm) level, this is done
with CPP macros.
The main structure is now struct intrsource, describing an established
interrupt line, of any kind (soft/hard local apic/legacy apic/IO apic).
For quick masking, there may be a maximum of 32 sources per CPU.
Sources can be assigned to any CPU in the MP case, though currently they
all go to the boot CPU.
caveats, but works quite well in a lot of MP cases, and all
UP cases that I have tested. Parts of this will hopefully be
reworked in the not-too-distant future.
driver attaches where "pchb" would normally attach (it matches at a
higher match priority). The "elansc" driver currently provides support
for the watchdog timer built-in the SC520.
Thanks to Jasper Wallace for laying the ground-work for this (most
notably by providing a work-around for a watchdog-related bug in the
SC520).
- implement SIMPLEQ_REMOVE(head, elm, type, field). whilst it's O(n),
this mirrors the functionality of SLIST_REMOVE() (the other
singly-linked list type) and FreeBSD's STAILQ_REMOVE()
- remove the unnecessary elm arg from SIMPLEQ_REMOVE_HEAD().
this mirrors the functionality of SLIST_REMOVE_HEAD() (the other
singly-linked list type) and FreeBSD's STAILQ_REMOVE_HEAD()
- remove notes about SIMPLEQ not supporting arbitrary element removal
- use SIMPLEQ_FOREACH() instead of home-grown for loops
- use SIMPLEQ_EMPTY() appropriately
- use SIMPLEQ_*() instead of accessing sqh_first,sqh_last,sqe_next directly
- reorder manual page; be consistent about how the types are listed
- other minor cleanups
NULL for root PCI busses. For busses behind a bridge, it points to
a persistent copy of the bridge's pcitag_t. This can be very useful
for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
uses OFW device nodes to enumerate the bus. When a PCI bus that is
behind a bridge is attached, pci_attach_hook() allocates a new PCI
chipset tag for the new bus and sets it's "curnode" to the OFW node
of the bridge. This is used as a starting point when enumerating
that bus. Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.
This is required when two or more bridges on the same bus, and some of
them are incompletely initialized by BIOS.
Reported by NAKAGAWA Yoshihisa <y-nakaga@nwsl.mesh.ad.jp>
Do not initialize global variables 'pciintr_icu_tag' to NULL.
Its type is 'const struct pciintr_icu *' (typedef'ed) and gcc sometimes(!)
put it in Text region. So force arrrange it to BSS.
-remove the check for i810's internal graphics completely: we'll attach
AGP whether in GFX or AGP mode anyway, and the SMRAM register test
was of questionable value (should have masked with 0xc0, but even then
the builtin graphics appeared enabled although I used an external
PCI card)
be spread over several devices, and the phcb is usually the main one.
Add agp_machdep.c file which implements MD agp functions (currently
just agp_flush_cache).
