thorpej
35d282c8d5
Make sure SYS_exit and SYS___sigreturn14 are defined. Garbage collect
...
SYS_sigreturn.
1998-09-30 22:23:13 +00:00
thorpej
38084c6615
Note that trap #1 is compat_13_sigreturn, and give trap #3 to syscalls
...
which require special handling, e.g. sigreturn on m68k.
This differs from the old sigreturn trap in that we require the syscall
number to be in register d0, just like the regular syscall entry point.
This will allow sigreturn to be versioned in the future without the need
to allocate another trap vector.
1998-09-30 22:14:11 +00:00
thorpej
1ce207046d
Adapt to signal changes.
1998-09-30 21:55:02 +00:00
thorpej
aaec09ab91
Pull in <m68k/frame.h> if __M68K_SIGNAL_PRIVATE, for sigstate.
1998-09-30 21:52:45 +00:00
thorpej
f6ea7521d7
Put the sigstate and sigframe definitions in signal.h, protected by
...
__M68K_SIGNAL_PRIVATE.
1998-09-30 21:04:48 +00:00
matthias
777ffc95a2
Fix a small type in sendsig.
...
Fix some esym typeclash lossage.
1998-09-30 20:20:03 +00:00
matthias
5267ada16a
use __sigreturn14 in sigcode.
1998-09-30 20:17:29 +00:00
matthias
d067796204
config doesn't like c-style comments.
1998-09-30 20:16:17 +00:00
pk
f382e91b5e
Add a field to identify the processor that has a process' FPU context.
1998-09-30 18:40:58 +00:00
ragge
6530a14556
Typo.
1998-09-30 18:40:04 +00:00
pk
4826aac9cf
Make the current FPU owner (`fpproc') a per-CPU entity. Unresolved issue
...
as yet: lazy FPU context switching may require co-operation from other
CPUs.
1998-09-30 18:38:57 +00:00
ragge
c0b9fc5616
Make kernel compile after recent signal changes.
1998-09-30 14:09:59 +00:00
thorpej
21adfe5c18
Oops, brain'o.
1998-09-29 23:45:25 +00:00
matt
cf95587273
Sync with GENERIC.
1998-09-29 23:18:57 +00:00
thorpej
16b0d8f1e4
Disable the code that halts secondary processors in cpu_reboot(). Halting
...
the secondary works, but not when called from here?! XXX!
1998-09-29 21:59:33 +00:00
thorpej
ce57c93ef5
some temporary debugging printfs in the IPI code.
1998-09-29 19:40:33 +00:00
drochner
fb345194ad
document CLOCK_COMPAT_OSF1
1998-09-29 18:25:54 +00:00
drochner
70d1e71ea0
Allow to use the RTC chip in a way compatible to OSF/1: use an offset
...
of 52 years between RTC and UNIX time.
This is controlled by "option CLOCK_COMPAT_OSF1".
1998-09-29 18:23:55 +00:00
drochner
88b626a585
make compile w/o MULTIPROCESSOR
1998-09-29 15:55:47 +00:00
thorpej
55df520938
Can't use -traditional; __RENAME() breaks due to a limitation in the
...
"traditional" C preprocessor.
1998-09-29 08:28:20 +00:00
thorpej
5a5380b92b
This program is icky, and will die soon. So, don't put a whole lot of
...
effort into it, but make it build again by casting the second arg to signal().
1998-09-29 08:27:36 +00:00
thorpej
005af97f9e
Use "print-objdir".
1998-09-29 08:16:11 +00:00
thorpej
69d81d8df1
Prototype cpu_halt_secondary().
1998-09-29 07:07:36 +00:00
thorpej
30e4de5632
In cpu_reboot(), halt the secondary CPUs.
1998-09-29 07:07:09 +00:00
thorpej
1b8e855f2a
First try at a HALT interprocessor interrupt handler.
1998-09-29 07:06:02 +00:00
thorpej
94b97dce9b
CPUF_HATCHED is dead, replaced by cpus_running bitmask.
1998-09-29 07:05:30 +00:00
thorpej
99698d1a1a
- Use a bitmask for "running CPUs", rather than a flag in the softc.
...
- Add a function to halt a secondary CPU.
- Enable interrupts on secondary CPUs once they've hatched.
1998-09-29 07:04:58 +00:00
thorpej
469f020ae3
Don't process CLOCK or DEVICE interrupts if we're not the primary CPU.
1998-09-29 07:02:04 +00:00
thorpej
30ec5015b1
In exception_return(), if MULTIPROCESSOR, skip software interrupts, ASTs,
...
and floating point handling if we're not the primary CPU.
1998-09-29 07:01:16 +00:00
thorpej
392a96cc91
Define the offset of hwrpb->rpb_primary_cpu_id.
1998-09-29 06:22:09 +00:00
scottr
ce9e4beacf
Simplify the asm constraints in mrg_aline_super(), in order to
...
less thoroughly confuse the compiler when used without -O. Fixes
PR 5496.
1998-09-29 05:24:08 +00:00
thorpej
183f609c83
- Do not set TLCPUMASK on non-I/O nodes. That register exists only on
...
I/O nodes. Previous code erroneously set it on CPU nodes only.
- In both the single- and multi-processor case, route all interrupts from
I/O nodes to the primary CPU, for now.
1998-09-29 04:22:36 +00:00
erh
3c2e2c8622
This should need opt_execfmt.h.
1998-09-28 23:42:48 +00:00
thorpej
4c2e179b93
PROM doens't need to be mapped to start up the secondaries, so remove some
...
dead code.
1998-09-28 22:21:13 +00:00
thorpej
9bd45385a9
Turn off some debugging printfs, and kludge around a boot block bug until
...
I can install fixed boot blocks on my MP test systems.
1998-09-28 21:50:32 +00:00
thorpej
705cac105e
Invalidate the TB and I-stream upon entry, and fix a typo in the wrkgp call.
1998-09-28 21:48:50 +00:00
thorpej
34a8ac8484
Set the primary CPU's PAL revision to the OSF/1 PAL revision after switching
...
to it, per the Green Book (pointed out by Chris Demetriou).
1998-09-28 21:21:55 +00:00
thorpej
5caecb6ae0
Fix for some EGCS warnings.
1998-09-28 21:18:55 +00:00
sakamoto
fd24065cb5
pcvt is no longer used with bebox.
1998-09-28 09:49:49 +00:00
sakamoto
4a04e5038e
pcvt is no longer used with bebox.
1998-09-28 09:33:12 +00:00
leo
e30046b37d
This was a copy of an very old editing error in the amiga pmap.c....
...
(Ignatios Souvatzis)
1998-09-28 07:51:23 +00:00
drochner
980b2b416f
fix PMAP_ACTIVATE_ASN_SANITY() arguments
1998-09-27 17:23:25 +00:00
pk
8c29324cc7
Kernel configuration with multi-processor support.
1998-09-27 15:10:25 +00:00
scottr
a965fe73b1
Add support for the TFL LAN Inc. E410/E420 PDS cards. Based on code
...
from Ken Nakata in PR 6199, which was in turn derived from code from
Haru Maruyama <h-maru @ da2.so-net.ne.jp>.
1998-09-27 14:39:11 +00:00
pk
0a090af2c7
Add `ldstub()'.
1998-09-27 14:32:14 +00:00
pk
e6ce8bcfc7
sparc spin lock functions.
1998-09-27 14:31:18 +00:00
mycroft
b7f86e40fa
The smallest positive normalized number in extended precision is 2^-16383.
...
Underflow handling is different from i387.
1998-09-27 04:54:49 +00:00
drochner
463301afbf
Use common date conversion functions - not runtime efficient, but
...
brain-efficient...
1998-09-26 21:02:56 +00:00
drochner
1826b0bca2
Use the RTC chip as time-of-year clock, as the PROM console and Ultrix do.
1998-09-26 20:59:42 +00:00
pk
0a1a6fb7e0
This file is no longer used
1998-09-26 20:51:45 +00:00
pk
166c2a5fa5
fix typo
1998-09-26 20:15:59 +00:00
pk
9f352b7e15
Stop all other CPUs upon entering a debugger.
1998-09-26 20:14:48 +00:00
pk
01e64c640c
Implement mp_pause_cpus() and mp_resume_cpus(): pause and resume all
...
CPUs except the one running this code.
1998-09-26 20:13:56 +00:00
pk
6ad3a051e8
mp_{pause,resume,halt}_cpu() prototypes.
1998-09-26 20:12:06 +00:00
is
6eb98a7967
4/NPTEPG is 0. This is a very old editing error.
1998-09-26 19:26:58 +00:00
christos
029ab07a4d
delint
1998-09-26 19:21:19 +00:00
pk
8ddcd514a6
Use CPU start function in obp.c
1998-09-26 19:09:56 +00:00
pk
fe1cf94b9f
Add wrappers for PROM's CPU start/stop functions.
1998-09-26 19:08:09 +00:00
pk
a89a10c394
Add file obp.c
1998-09-26 19:06:47 +00:00
pk
43c1cb852c
Move PROM interface prototypes into openprom.h
...
Use the `openprom_addr' structure for passing around physical addresses.
1998-09-26 18:20:19 +00:00
pk
09a4cf6caa
Move PROM interface routines into their own file.
1998-09-26 18:15:34 +00:00
dante
d208510692
Add support for AdvanSys Ultra Wide boards
1998-09-26 16:38:43 +00:00
drochner
87fab23d68
make it compile with DEBUG
1998-09-26 10:07:36 +00:00
nisimura
b356238b16
Add one more new MIPS processor PRid 0x30 for IDT RC64474/64475. These
...
are successors of RC4640/RC4650, but fully brewed MIPS, then capable of
running NetBSD/mips.
1998-09-26 08:16:38 +00:00
mark
7af1966350
Regenerate from podules.
1998-09-26 03:30:50 +00:00
nisimura
3da75bb55d
Update the list of MIPS processor revision ID. PRids of Toshiba TX3900
...
and QED R4650 comflict each other.
1998-09-26 03:29:37 +00:00
mark
a96d8e733a
Add EESOX manufacturer ID and SCSI2 podule ID.
1998-09-26 03:29:36 +00:00
thorpej
2c50ec242f
Add basic interprocessor interrupt sending and receiving code. Current
...
IPI functions: HALT, IMB, TBIA, TBIAP.
XXX HALT is not yet implemented, it's just a stub.
1998-09-26 00:03:51 +00:00
thorpej
78d445810b
Add an interprocessor interrupt bitmask to the cpu_softc, and publicize
...
the cpus[] array.
1998-09-26 00:01:17 +00:00
thorpej
1f4921edce
- Oops, forgot to initalize the cpu_softc simplelock.
...
- Add yet another debugging printf.
1998-09-26 00:00:33 +00:00
thorpej
e2aa38459c
Implement atomic quadword load-and-latch.
1998-09-25 23:59:42 +00:00
thorpej
01c75223d7
Minor style tweaks.
1998-09-25 22:06:33 +00:00
pk
eb8de83739
`eccmemctl' inadvertently got into the `mandatory' list.
1998-09-25 11:40:16 +00:00
thorpej
d3ce2be01c
Don't bother printing the message from the secondary console. All it is
...
is basically the acknowledgement of the START command. Print the idle
USPACE address for now. Use the alias "apcb_backup_ksp" when setting the
backup kernel stack pointer in the secondary's boot HWPCB.
1998-09-25 03:23:50 +00:00
thorpej
57e656b2ec
The processor unique value in the PCB is used as a backup kernel stack
...
pointer when booting secondary CPUs. Add an alias for it.
1998-09-25 03:21:31 +00:00
thorpej
3ea9247ac8
GENERIC config file + MULTIPROCESSOR + some debugging stuff.
1998-09-25 00:46:09 +00:00
thorpej
fcb0203141
First-cut at code to spin up secondary processors on a multiprocessor
...
Alpha system, conditional on MULTIPROCESSOR.
NOTE: This does not yet work completely. The secondary CPU begins the
boot process, but never makes it into the cpu spinup trampoline. This
is merely a snapshot of a work-in-progress.
1998-09-24 23:28:17 +00:00
thorpej
feb1d22dcc
NCPU > 1 -> MULTIPROCESSOR
1998-09-24 23:00:43 +00:00
thorpej
3cde5f5817
Machine-dependent spin lock operations for Alpha, included if MULTIPROCESSOR
...
is specified.
1998-09-24 22:32:35 +00:00
thorpej
91a031471d
Implement atomic test-and-set for longwords (32-bit).
1998-09-24 22:22:07 +00:00
thorpej
1b04ff4897
Make prom_enter() and prom_leave() public.
1998-09-24 21:18:13 +00:00
thorpej
ba6d13d876
Use the primary CPU ID on console_restart(), not hard-coded 0.
1998-09-24 21:12:43 +00:00
pk
27569e4050
Initialize pointer to the boot CPU's interrupt register.
1998-09-24 20:38:43 +00:00
pk
831354d6de
Add `intreg' cpuinfo offset.
1998-09-24 20:37:17 +00:00
ross
e43333b7e7
Move if_ade* from alpha/pci/ to alpha/a12/
1998-09-24 05:36:05 +00:00
ross
09c3723e08
Put back ahc and bha scsi HBA driver configs.
1998-09-24 05:33:41 +00:00
ross
81ea242049
Fix include path, these days a12 header files are in alpha/a12.
1998-09-24 05:32:52 +00:00
ross
ec4de2679b
Track tfs -> ustarfs change.
1998-09-24 05:23:58 +00:00
thorpej
c69dbb3c28
Actually, yes we do know what the rpb_restart entry point is used for,
...
so delete some #if 0'd code.
1998-09-24 03:39:24 +00:00
thorpej
7521c309df
When setting up the hwrpb for restarts, use the primary CPU ID from the
...
hwrpb.
1998-09-24 00:30:19 +00:00
thorpej
7df5ebc392
"Gee, there was already a function to do that."
1998-09-23 22:02:21 +00:00
thorpej
53d42701b5
Implement a function to recompute the HWRPB checksum.
1998-09-23 21:51:04 +00:00
ross
86f044d10e
Track changes elsewhere in the PCI interface.
1998-09-23 21:20:55 +00:00
ross
55714d5b34
Update for vm_offset_t, vaddr_t sweep.
1998-09-23 21:17:17 +00:00
ross
ddde99135e
A12 crossbar switch driver.
1998-09-23 21:14:58 +00:00
ross
73fdd29a64
A12 detached console tty driver and NetBSD console interface.
1998-09-23 21:14:02 +00:00
pk
58ab38cb69
Use per-CPU interrupt status register.
1998-09-23 11:07:28 +00:00
pk
9eca565a37
Make cgsix_sbus & cgsix_obio dependent on their respective attribute.s
1998-09-23 08:49:46 +00:00
pk
d6746389a4
The nmi_* routines are sun4m-only.
1998-09-23 08:44:51 +00:00
thorpej
d720002637
Fix a typo in RCS keyword.
1998-09-22 16:23:20 +00:00
scottr
7c4c19c768
First pass KNF. This probably needs more work.
1998-09-22 16:01:51 +00:00
pk
aa1cf01930
Express per-processor interrupt registers in a C structure as well.
1998-09-22 13:42:26 +00:00
pk
bd37118769
Dup header.
1998-09-22 13:41:03 +00:00
pk
eca50c1c33
Flush cache after diddling with trap vectors.
1998-09-22 13:40:08 +00:00
pk
1186ba5102
Introduce a `flush entire cache' method.
1998-09-22 13:39:19 +00:00
pk
5afb0e8bcb
Keep the per-processor interrupt status in the cpuinfo structure.
...
For now, map them to the fixed virtual addresses set up early in autoconf.c
1998-09-22 13:08:44 +00:00
thorpej
5fa16c668b
Define the inter-console communication buffer portion of the per-cpu
...
info structure.
1998-09-22 08:16:51 +00:00
ross
ec49dd71dd
Change 41 separate printf()'s into a table and 2 printf()'s.
1998-09-22 06:24:26 +00:00
thorpej
6871d2529f
Add missing mb ops.
1998-09-22 06:10:53 +00:00
thorpej
402a9210a2
Implement quadword atomic test-and-set.
1998-09-22 05:56:52 +00:00
chs
c945760779
sign-extend some operand types which need it.
1998-09-22 05:40:14 +00:00
ross
5b01d45ac4
Add a `-b #' option and logic for locating the secondary boot image via
...
an absolute block address. It's cheating, as the motivation is support for
the libsa ustar tfs `filesystem' and the solution symmetrical to ufs and
cd9660 would have been to teach installboot about tfs. However, it still
would have been different as you can't mount a tfs with the kernel, and
this option gets possibly useful support for any contiguous format, even
completely raw boot images.
1998-09-22 05:03:36 +00:00
thorpej
e10cc7910d
Add some support for multiple processors to the pmap module. Still left
...
to do: TLB shootdown code, but that will be much easier to write once
the code to spin up the additional CPUs is working.
1998-09-22 03:58:10 +00:00
mark
bc3dce964b
Declare the coda character device functions here.
1998-09-22 03:42:10 +00:00
mark
2a4d75715c
cfs/CFS -> coda/CODA in strings.
...
Move the cdev declaration for the code filesystem to conf.h
1998-09-22 03:40:42 +00:00
eeh
1cc6223a9c
More fixup in the signal area.
...
64-bit syscall cleanup.
Add emulation for some new FPU insns: conversion to 64-bit long int and
conditional moves.
1998-09-22 02:48:42 +00:00
mark
5a0ae6393f
Make isa_bs_subregion() work.
1998-09-22 01:47:53 +00:00
mark
f26ab10148
Spring clean this file.
...
Include dev/isa/files.isa and remove all the mess that is now included
in files.isa
1998-09-22 01:45:47 +00:00
mark
9bdaa48cd5
Hey, lets try using arm32/isa/joyvar.h instead of the bebox one ;-)
1998-09-22 01:42:21 +00:00
mark
03d5fdff96
Fix slightly liberal use of #ifdef DEBUG in last commit.
...
If we get a data abort in SVC mode it is BAD and we cannot recover
so we always want to panic.
1998-09-22 01:40:28 +00:00
mycroft
2ebc36c0fd
Slight edit to previous.
1998-09-22 01:16:48 +00:00
mark
6ce4eb9769
We now use the MI wdc/wd drivers so this code is no longer needed.
1998-09-22 00:44:20 +00:00
mark
4f7b1f2739
Removed icside_io.c
1998-09-22 00:43:18 +00:00
mark
a77e995d18
This file is no longer needed with the rewritten attachment to use the
...
MI wdc driver.
1998-09-22 00:42:40 +00:00
ross
5fb9c16f05
While we are here in alpha/stand, bail out on ^C during boot.
1998-09-22 00:41:13 +00:00
mark
071b4fc4d2
Re-written the wdc attachments to attach to the MI wdc driver instead
...
of the MD one.
1998-09-22 00:40:37 +00:00
ross
10da0cf1c3
Add fs_ops to file_system[] for the ustar-format `tfs'.
1998-09-22 00:39:31 +00:00
mark
4494dc9cfc
Removed MD wdc/wd files.
...
Include dev/ata/files.ata and using dev/ic/wdc.c for everything.
1998-09-22 00:37:51 +00:00
mark
aa9401f832
Fix calculation of I/O range when printing child information.
1998-09-22 00:33:51 +00:00
thorpej
2671c2fa42
Make bus_dmamap_load_uio() work, from Kevin Lahey <kml@nas.nasa.gov>.
1998-09-21 22:51:56 +00:00
pk
709360e3ce
Fill the `bpp' slot.
1998-09-21 21:13:51 +00:00
tsubai
bd8b85cdd8
Correct battable[] usage.
1998-09-21 17:16:26 +00:00
tv
d909dcee1c
Do not print, or even compile in, non-fatal diagnostics unless DEBUG is set.
1998-09-21 11:24:11 +00:00
pk
20f2898a0c
Merge sun4 and sun4c version of memerr() again.
1998-09-21 10:32:00 +00:00
pk
af19654e85
We no longer need to access memerr() through a function pointer.
...
GC `cpumod' and `mmumod'.
1998-09-21 10:30:41 +00:00
pk
c3b26811ac
We no longer need to access memerr() through a function pointer.
1998-09-21 10:29:20 +00:00
matt
ad921921e4
Add softserial to the alpha port. This significantly improved PPP
...
throughput on com ports.
1998-09-21 00:33:16 +00:00
pk
ec34e18063
Don't map sbus `registers' on sun4c (i.e. sbus @ mainbus); it's almost
...
certainly not the control space we want..
1998-09-20 20:08:52 +00:00
pk
7a147080b8
Async arguments are no longer passed to the memory fault handler.
1998-09-20 20:01:15 +00:00
pk
4bf750b7df
Add sun4m NMI handlers.
1998-09-20 20:00:09 +00:00
pk
d0d9bb7669
Dedicate a pair of entry points to handling sun4m level 15 (NMI) interrupts.
...
Hardware NMIs are generated on various fault conditions that take place
asynchronously to the instruction stream. Software NMIs are going to be used
for inter-processor communications.
Get synchronous fault information separately from asynchronous fault
information. Do the former right after taking a memory fault trap and
store the values in temporary locations within the cpuinfo structure (XXX),
so we can unconditionally clear the sync fault status register after
MMU probe operations. This all is to work around a Hypersparc feature
which could lead to loss of fault information because of the fault
status register getting locked.
1998-09-20 19:54:48 +00:00
pk
cd8dfa6798
Account for changes in struct cpuinfo & locore
1998-09-20 19:39:18 +00:00
pk
4128057c52
Split memory fault status function into `synchronous' and `asynchronous'
...
versions.
1998-09-20 19:37:50 +00:00
pk
2734182a74
Re-arrange the sun4m cases a bit.
...
Entry points no longer have async arguments.
1998-09-20 19:34:16 +00:00
pk
c3e742adfb
Format string for SI register.
1998-09-20 19:31:37 +00:00
pk
b6da06d637
Name fault registers more like they're referred to in various docs.
1998-09-20 19:29:10 +00:00
scottr
9d640ee3ad
Make this compile again, as pointed out by Paul Goyette.
1998-09-20 19:17:38 +00:00
thorpej
47ca861322
Nuke some unneeded debugging code.
1998-09-20 18:54:03 +00:00
thorpej
3eaeeb5357
Add definitions for the maximum allowable `whami' procssor ID and the
...
maximum number of processors we'll allow (64, assuming procssor IDs start
at 0).
1998-09-20 18:28:50 +00:00
mark
53f576f788
bus_space_copy_* -> bus_space_copy_region_*
...
Add BUS_SPACE_COMPAT_OLDDEFS for bus_space_copy_* compat.
1998-09-20 03:37:29 +00:00
pk
a1a94bc5fc
Use the expected name for the config attach structure.
1998-09-19 16:50:31 +00:00
pk
0a6347a24d
Provide an error entry point like sbus and memory.
1998-09-19 16:45:43 +00:00
pk
812eb8c1da
Add %b format strings.
1998-09-19 16:44:59 +00:00
pk
25d48215a2
Map Sbus control registers.
1998-09-19 15:49:50 +00:00
pk
8381b55bd7
Add a bunch of SBus control register definitions.
1998-09-19 15:48:55 +00:00
pk
1bcd9d3bbb
Pass the children register space in the attach arguments.
1998-09-19 15:47:18 +00:00
pk
ced4225429
Add `eccmemctl' device.
1998-09-18 20:19:12 +00:00
pk
b3c7ebb7cd
Handle ECC memory control found on a number of machines.
...
Also defines an entry point for memory errors reported by module interrupts.
1998-09-18 20:18:10 +00:00
drochner
a0ccc06ec5
Note which units memory sizes are counted in.
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Fixes half of PR port-i386/6159 ("Heiko W.Rupp" <hwr@pilhuhn.de>).
1998-09-18 12:22:54 +00:00
drochner
06753678d5
Remove the chips which are known to identify properly out of the
...
old "match" function - more or less for documentation.
Proposed by "Soren S. Jorvang" <soren@t.dk>.
1998-09-18 11:57:57 +00:00
drochner
1d34097b60
Take the Intel SIO into the special case list - it identifies itself
...
as "prehistoric". From John Kohl.
1998-09-18 11:13:10 +00:00
pk
81d435b491
sigh.. put back non-garbage collectible `que' functions.
1998-09-18 08:07:08 +00:00
scottr
45c0de8e37
Interrupt handling for the MicroConversions 2124NB II, from Paul Goyette.
1998-09-18 06:08:28 +00:00
sakamoto
6857706407
powerpc/bcopy.c is unnecessary.
1998-09-18 06:04:19 +00:00
mark
7482a84e6a
Be less verbose during various data aborts unless DEBUG is defined.
1998-09-18 04:09:57 +00:00
mark
9f474557fe
Allow boot arguments to override the host id on a per instance basis.
1998-09-18 03:23:19 +00:00
thorpej
b9a131261c
Define the new sigcontext structure.
1998-09-17 04:54:51 +00:00
thorpej
2eb8e8729b
Make the signal code look a bit more like the 32-bit SPARC port's.
1998-09-17 04:52:17 +00:00
thorpej
a7e5b3bcce
For _LP64, sigcontext must contain longs!
1998-09-17 04:51:29 +00:00
thorpej
5e8f492923
SYS_sigreturn -> SYS___sigreturn14.
1998-09-17 04:41:06 +00:00
thorpej
dcb541531a
Minor cosmetic change.
1998-09-17 02:33:06 +00:00
thorpej
c006c7c0da
Sync w/ sendsig().
1998-09-17 02:30:02 +00:00
thorpej
e5ea525b9f
Slight brain'o in last.
1998-09-17 02:26:26 +00:00
thorpej
5bc9dafaee
Minor cosmetic change to sendsig().
1998-09-17 02:24:56 +00:00
thorpej
cc485c1a08
Catch up with changes to signal delivery.
1998-09-17 02:01:59 +00:00
thorpej
7083b63277
Back out previous; I'm punting PowerPC to tsubai or sakamoto.
1998-09-16 23:51:27 +00:00
thorpej
ef3f4d39df
Need 103 longs for jmp_buf now (128-bit signal mask, at the front of the
...
jump buffer).
1998-09-16 23:33:18 +00:00
thorpej
3d4e54f11f
Need 87 longs for a jmp_buf now (we use sigcontext, which grew).
1998-09-16 23:15:08 +00:00
thorpej
7b32475079
Define the new sigcontext structure.
1998-09-16 23:14:15 +00:00
thorpej
6385066c76
Need 13 longs for jmp_buf now; 128-bit signal mask.
1998-09-16 23:13:57 +00:00
is
95807e512a
Garbage collect unused 3rd parameter to comprobe1().
1998-09-16 21:30:58 +00:00
pk
59e5588098
Map the per-CPU counter registers into each cpu info area.
1998-09-16 13:39:48 +00:00
pk
49b5114713
Make all cpu info structures accessible through an array `cpus[_MAXNCPUS]'.
1998-09-16 13:36:23 +00:00
thorpej
43f5b65e23
Define the new sigcontext structure.
1998-09-15 23:14:40 +00:00
thorpej
a034a22862
Need 21 longs for jmp_buf now, due to 128-bit signal mask (and use
...
of the sigcontext structure in the jmp_buf).
1998-09-15 23:06:41 +00:00
pk
543070847c
Can't afford a 1K buffer in the data segment.
1998-09-15 20:03:50 +00:00
scottr
573d1d344f
Add the DrHw value for the MicroConversions 2124NB II display adapter,
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from Paul Goyette.
1998-09-15 16:09:44 +00:00
pk
0ad1257add
sub-arch protection.
1998-09-15 13:12:25 +00:00
leo
f1c16a1b25
Oops, forgot this one in the vmebus renaming (Julian Coleman).
1998-09-15 10:45:11 +00:00
pk
fb38024157
Use `swap' to install page-table entries which is recommended practice
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for MP configurarions.
1998-09-14 22:45:36 +00:00
pk
1736bda754
Define `swap'.
1998-09-14 22:43:29 +00:00
thorpej
dbebd9b148
Need 13 longs for jmp_buf; signal mask is 128 bits now.
...
XXX Actually, libc appears to use only 7 of the previous 10, so increasing
the size isn't actually necessary! But there was a gap at the end before,
so we'll keep it.
1998-09-14 21:31:52 +00:00
thorpej
e30eafbbc6
Need 29 longs for jmp_buf now; signal mask is 128 bits.
1998-09-14 18:06:01 +00:00
leo
d8ea31db0f
Improve initialisation of the Crazy Dots card. (Julian Coleman)
1998-09-14 14:25:38 +00:00
pk
0a46abfd42
Collect redundant code into cpu_setup().
1998-09-14 10:37:12 +00:00
pk
b1b69e4195
Fix cache bit confusion in pmap_alloc_cpu().
1998-09-14 09:46:11 +00:00
jonathan
0b09668693
Fix typos in signal rework (sc.regs -> sc-regs, rege -> regs).
1998-09-14 07:04:06 +00:00
thorpej
a4a356f9a6
Need 83 longs for a jmp_buf now.
1998-09-14 06:07:29 +00:00
thorpej
27f3588d7b
oops, missed one.
1998-09-14 02:50:12 +00:00
thorpej
cbfc257eda
sigset13_t -> int.
1998-09-14 02:48:33 +00:00