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27986 Commits

Author SHA1 Message Date
matt
f47c5bbd3d Under ELF, change clock_t and time_t to int's (more LP64 friendly). 2001-07-28 05:04:45 +00:00
bjh21
9139a37393 New arm26 bootloader. Mostly a translation of BBBB into C, using libsa so 
we get goodies like gzipped kernels for free.
 2001-07-27 23:13:49 +00:00
bjh21
0ad24007df Add assorted stuff that we need in order to shut RISC OS down cleanly. 2001-07-27 23:09:15 +00:00
scw
27ae3aab7c Blah, yet another nit: s/irq/ipl/ 2001-07-27 21:56:10 +00:00
scw
ea00e7cda2 Don't bother trying to initiate a DRAM scrub on startup as it requires 
frobbing with registers which are marked as "For Test Purposes [only]".
 2001-07-27 21:54:07 +00:00
bjh21
d8372315a2 Rudimentary OS_Byte support, and an extra VDU variable. 2001-07-27 21:10:04 +00:00
bjh21
d939fd1e55 Add support for OS_ReadVduVariables, with #defines for the variables that BBBB 
uses.
 2001-07-27 20:49:09 +00:00
scw
c184f03348 Remove Mistakenly Left In comments around some `#ifdef DIAGNOSTIC' tests. 2001-07-27 20:48:58 +00:00
bjh21
a24c2adedf Limit the heap so as to allow 4 KB of stack, which should be enough for most 
purposes.
 2001-07-27 20:48:20 +00:00
scw
8343a1492f Forgot to shift the DRAM Bank identifiers by four. 2001-07-27 20:33:35 +00:00
scw
f169034d7f Fix a braino in the check for a jumper across pins 1-2 of J1 (mvme1[67]7). 
Spotted by Chuck Silvers.
 2001-07-27 18:58:23 +00:00
scw
9ac6178585 memc attaches at mainbus now. 2001-07-27 18:40:27 +00:00
scw
7e2f2acb8e Flesh out the memory controller driver (at least for the MCECC chip) 
and attach it at mainbus since it depends both PCCChip2 and VMEChip2
(or the VMEChip2 interrupter) starting first.

We can finally enable, detect and log DRAM ECC errors.
(The PROM disabled ECC checks by default)
 2001-07-27 18:38:54 +00:00
ragge
f5abeb5b4b Set MAXPHYS to 64k instead of 63k. 2001-07-27 12:58:21 +00:00
ragge
39a7595b28 Calculation of unibus map register size was wrong. 2001-07-27 12:57:20 +00:00
bjh21
ea2ae3689c Twiddle. 2001-07-27 01:03:34 +00:00
bjh21
f68048b4eb Fix bug in xosgbpb_read: Check the correct register when deciding whether to 
store result.
 2001-07-27 01:02:44 +00:00
bjh21
5080e94490 OS_Args only really has two cases (reading and setting values). Use a generic 
assembler veneer for each of these, and implement the calls to read and set
specific values as macros.
 2001-07-27 00:37:38 +00:00
thorpej
0fb6b9a8f8 Rework the interrupt code, shaving some cycles off in the process. 
Rather than an "iointr" routine that decomposes a vector into an
IRQ, we maintain a vector table directly, hooking up each "iointr"
routine at the correct vector.  This also allows us to hook device
interrupts up to specific vectors (c.f. Jensen).

We can shave even more cycles off, here, and I will, but it requires
some changes to the alpha_shared_intr stuff.
 2001-07-27 00:25:18 +00:00
bjh21
2256fe3c2a Clear the BSS at startup, since objdump --outputformat=binary seems not to 
output the BSS.
 2001-07-27 00:21:18 +00:00
bjh21
218ce892b1 Fix up a left-over SWINE in os_writec. 2001-07-27 00:00:25 +00:00
wiz
79b57114c9 auxilary -> auxiliary 2001-07-26 23:07:57 +00:00
wiz
e11d04474c issueing -> issuing 2001-07-26 22:55:12 +00:00
wiz
035b63a542 auxilliary -> auxiliary 2001-07-26 22:53:13 +00:00
wiz
41df6b74a9 partiton -> partition 2001-07-26 22:47:34 +00:00
bjh21
7a181053ec Makefile for building standalone programs to run under RISC OS. 
Not used yet, but it will be.
 2001-07-26 22:16:26 +00:00
bjh21
9315195522 Simple library to interface stand-alone programs to RISC OS. 
This comes in two parts:  riscoscalls.[Sh] provide definitions, and thin
wrappers around RISC OS SWIs (in the style of OsLib) for the use of both the
rest of the library and client code.  The rest of the library provides a
compatibility layer for libsa.
 2001-07-26 22:11:08 +00:00
mjl
ab94842af6 Add rnd entropy gathering. 2001-07-26 21:31:45 +00:00
drochner
d2ef97080c make sure clockframe is __packed 2001-07-26 15:46:58 +00:00
drochner
b841a8e7cc pmap_changebit() requires pv tracking, so replace it by manual PTE construction 2001-07-26 15:45:51 +00:00
drochner
688026c828 use pmap_kenter/remove in pagemove() to make it work with memory mapped 
by pmap_kenter_pa() (ie buffer pages)
 2001-07-26 15:43:39 +00:00
drochner
2286fed799 incorporate patch from Chuck Silvers which basically reduces 
pmap_kenter_pa() / pmap_kremove() to the basics - ie, removes pv tracking
 2001-07-26 15:41:14 +00:00
wiz
30b2bf87ed Various typos in comments (neccessary, sceme, choise, ...). 2001-07-26 15:05:07 +00:00
tsubai
8ab2c794fd Make this compile w/o -DMIPS3. 2001-07-26 11:46:44 +00:00
tsubai
071e4602d9 Avoid panic when polling is used. 2001-07-26 11:44:06 +00:00
tsubai
1b3871ef0f Change description of handler-ID == 195. 2001-07-26 11:36:40 +00:00
tsubai
bacce8fb4c Fix a warning when compiled w/o DDB. 2001-07-26 11:23:37 +00:00
minoura
6ec544c64d implement pmap_k{enter_pa,remove}() correctly. 
other misc cleanup.
patch written by chs; equivalent to hp300 pmap.c:1.95.
 2001-07-26 02:21:58 +00:00
bouyer
21bcee4ec1 Return() if piomode == -1 (i.e. we have no drives), avoid reading an array with 
a negative offset.
Thanks to Andrew Cagney for pointing this out.
 2001-07-25 20:26:33 +00:00
tsutsui
9d5b24f779 Apply pmap_k{enter_pa,remove} patches provided by Chuck Silvers. 2001-07-25 15:59:48 +00:00
tsutsui
6fa8cc9467 Sync with hp300/vm_machdep.c rev 1.60: 
> use pmap_k* for pagemove().
> call pmap_remove() explicitly in vunmapbuf() in preparation for
> upcoming UVM changes.
 2001-07-25 15:56:30 +00:00
tsutsui
5db9f9aa7c Cosmetics. (some KNF, typo etc.) 2001-07-25 15:48:09 +00:00
drochner
23204e4b5f document 3c90xb support 
use default settings which make more sense (for me)
 2001-07-25 12:51:44 +00:00
drochner
a3cdd518ad make it compile after i82557reg.h changes 2001-07-25 12:47:34 +00:00
aymeric
16d48eec82 These programs are for the host, not for the target, to execute. 2001-07-25 12:32:48 +00:00
eeh
7950c7dffd Don't match ebus nodes not called "ebus" like the ones on hme cards. 2001-07-25 03:49:54 +00:00
rafal
e9ad38e77d Fix bug in mips3_proc_trampoline: SR wasn't disabled on entry, allowing an 
interrupt to sneak in after EXL had been set; the interrupt EPC was stale
as PC isn't saved if EXL is set, causing the eret to return to the wrong
place and leading to kernel-mode TLB misses on user addresses.  The bug
was discovered by the japanese NetBSD/*mips folks and the same fix was
found independently by shinohara-san (shin@netbsd.org).
 2001-07-24 23:13:33 +00:00
wiz
d2cede024b Replace some memcpy()s with probably overlapping arguments with memmove()s. 2001-07-24 22:29:07 +00:00
eeh
57b56da169 Garbage collect. 2001-07-24 19:32:11 +00:00
eeh
f13bad30d7 Use OF routines instead of internal ones. 2001-07-24 19:30:14 +00:00