for the i82596 PORT access interface, from the documentation
for that chip. These help clarify writes to the SYSBUS
part of the SCP, and PORT usage by i82596-aware drivers.
This adds support for EtherExpress/16 cards with 16k of RAM, and in the
process adds general support for PIO mode on these cards. This entails
changing the way the i82586 driver handles bus barriers, since it doesn't
allow for strange cases like this.
This has been tested on the i386 port with the 'ix' driver in both
16KB (which was the source of the problem) and 32KB modes, as well
as with the 'ef' driver. I've tested it (briefly) with 'ei' on arm26
as well. In theory, drivers other than 'ix' should follow precisely the
same code paths as before.
fredette