http://mail-index.netbsd.org/tech-kern/2003/09/25/0007.html
We now have:
acardide* at pci? dev ? function ? # Acard IDE controllers
aceride* at pci? dev ? function ? # Acer Lab IDE controllers
cmdide* at pci? dev ? function ? # CMD tech IDE controllers
cypide* at pci? dev ? function ? # Cypress IDE controllers
hptide* at pci? dev ? function ? # Triones/HighPoint IDE controllers
optiide* at pci? dev ? function ? # Opti IDE controllers
piixide* at pci? dev ? function ? # Intel IDE controllers
pdcide* at pci? dev ? function ? # Promise IDE controllers
siside* at pci? dev ? function ? # SiS IDE controllers
slide* at pci? dev ? function ? # Symphony Labs IDE controllers
viaide* at pci? dev ? function ? # VIA/AMD/Nvidia IDE controllers
pciide* at pci? dev ? function ? flags 0x0000 # GENERIC pciide driver
serverworks driver not commited yet; there are still copyright issues about
it.
http://mail-index.netbsd.org/tech-kern/2003/09/25/0006.html
This adds a device (atabus) between IDE controllers and wd or atapibus, to
have each ATA channel show up in the device tree. Later there will be atabus
devices in /dev, so that we can do IOCTL on them.
Each atabus has its own kernel thread, to handle operations that needs polling,
e.g. reset and others.
Device probing on each bus it defered to the atabus thread creation.
This allows to do the reset and basic device probes in parallel, which reduce
boot time on systems with several pciide controllers.
removing assumptions that there are only two B channels and by
adding support for a varying number of channels.
Due to this, rename previously used isdn identified "bri" to "isdnif",
which better describes the current situation.
* auich_calibrate() assumes that the AC97 part is in its reset state. To
ensure this, call audio_attach_mi() after auich_calibrate().
* Explicitly support 12000Hz and 24000Hz. (Why is there a discrete list at
all?)
* Fix an obvious recording bug -- we were acking the wrong interrupt.
* Ensure that we don't get an interrupt during the AC97 speed probe by clearing
the "interrupt on completion" bit in the DMA setup.
interface controllers (of varying intelligence levels).
Contributed by Wasabi Systems, Inc. Primarily written by Steve Woodford,
with some modification by me.
to pci_attach_args. The latter is allocated on the stack during auto-
configuration and so will not be valid after that time.
It's amazing how the old code worked for so long. I guess pci_attach_args
is allocated deep in pid#0's kernel stack on most platforms.
- if_bcereg.h should only have register definitions, so declarations
of softc structure etc. should be in if_bce.c.
- The types of DMA descriptors should be u_int32_t, not unsigned long.
- netinet headers are not required here.
- Values passed via bce_tx_ring should also be byte-swapped.
- byte-swapping is not needed for bus_space access.
from me:
- KNF
- mark all magic numbers with /* MAGIC */ so they can be identified at
some point. there are 33 in total though many appear to be the same
value, or related (eg, the 6 emac points.)
leaves these issues:
- RX pre-packet headers need to be byte-swapped or not?
- PAGE_SIZE bytes are allocated for both TX and RX DMA ring descriptors,
but they should be 1024 (== sizeof(struct bce_dma_slot) * N[TR]XDESC).
- the mcast filter.
The driver backend is capable of supporting also ISA cards (no DMA)
and primary rate (PRI) cards in addition to the basic rate ones,
but I don't any to test on right now, so we don't support those
currently.
This code was originally written by Juha-Matti Liukkonen <jml@cubical.fi>
of Cubical Solutions Ltd. for FreeBSD, and was ported to NetBSD by
myself for the same company.
CCB is returned to the caller.
- Make code paths that can use twe_ccb_alloc_wait() use it, and assert
that a CCB is always returned from that function.
- Assert that a CCB is always returned when allocating the reserved CCB
for an AEN fetch.
reserved CCB. This means that all remaining callers of twe_param_get*()
are called from a valid thread context, and thus have no need to use a
reserved CCB. This will allow for further cleanup in a future commit.
1) Don't wait for DRQ on an IDENTIFY command -- if it's not set when we see
BSY clear, abort the command and ignore the drive. (Do this by testing
for DRQ in the read/write cases in __wdccommand_intr().)
2) Don't wait for DRQ to deassert when we finish an IDENTIFY (or any other
non-block command that reads data) -- we don't do this for block I/O, and
empirically it doesn't clear on my CF cards at all, causing a pointless 1s
delay.
3) Add comments to some of the delay()s, and add missing ones in wdcreset()
and the WDCC_RECAL in the so-called "pre-ATA" probe.
4) Slightly simplify the reset sequence -- we were doing an extra I/O.
5) Modify the register writability test to make sure that registers are not
overlapped -- this can happen in some weird cases with a missing device 1.
6) Check the error register value after the reset -- if it's not 01h or 81h,
as appropriate (see ATA spec), punt.
Tested with a number of ATA-only, ATAPI-only, mixed ATA-ATAPI, CF, and IDE
disk configurations.
Also remove the SINGLE_DRIVE nonsense again.
- Make AENs use the generic code table stuff.
- Add a few more AEN codes (from FreeBSD).
- Correct the context of a few AEN codes (some were listed as
"unit context" when they're really "port context").
- Add a queue of AENs that management tools in userspace can poll
(from FreeBSD).