Commit Graph

45 Commits

Author SHA1 Message Date
ad
225df3f88d Don't pull in unrelated gunk. 2008-01-04 22:03:25 +00:00
ad
4b293a84e1 Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.
2007-12-03 15:33:00 +00:00
garbled
d974db0ada Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree.  Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches.  The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
2007-10-17 19:52:51 +00:00
ad
63811f5275 Generic soft interrupts are mandatory. 2007-07-14 21:48:17 +00:00
tsutsui
73b3a64df4 Move declaretions of _spl*() and _{clr,set}softintr() functions
(which are in mips/locore.S) into <mips/locore.h>
from various MD files.
2007-06-17 06:04:27 +00:00
ad
3363855a4a Remove spllowersoftclock() and CLKF_BASEPRI(), and always dispatch callouts
via a soft interrupt. In the near future, softclock will be run from process
context.
2007-02-16 02:53:43 +00:00
ad
b07ec3fc38 Merge newlock2 to head. 2007-02-09 21:55:00 +00:00
yamt
8bf7662829 merge yamt-splraiseipl branch.
- finish implementing splraiseipl (and makeiplcookie).
	  http://mail-index.NetBSD.org/tech-kern/2006/07/01/0000.html
	- complete workqueue(9) and fix its ipl problem, which is reported
	  to cause audio skipping.
	- fix netbt (at least compilation problems) for some ports.
	- fix PR/33218.
2006-12-21 15:55:21 +00:00
riz
11f6dc7a44 Don't worry about the ELF32_MACHDEP_ENDIANNESS macro when compiling
a host tool - it's never used there.
2006-11-25 07:32:53 +00:00
tsutsui
9cdb8836f5 Fix wrong prototype declarations of _spl*() functions.
Pointed out by Havard Eidnes.
XXX: should these decls be in <mips/intr.h> or <mips/locore.h>?

While here, remove "extern" keyword from function declarations.
2006-11-18 16:40:21 +00:00
gdamore
f0cf1a4f32 Convert evbmis to __HAVE_GENERIC_TODR. 2006-09-02 20:27:21 +00:00
gdamore
12c3c2ae91 Convert evbmips to timecounters, using the MIPS3 cp0 clock.
This has been tested on AR5312, and I expect it to "just work" on
all evbmips systems.  (On AR5312, the counter is 110MHz. :-)
2006-09-02 02:04:25 +00:00
drochner
84f50d1b92 don't install <machine/db_machdep.h>, this is kernel only 2006-07-26 19:54:56 +00:00
gdamore
ccee3fc76f Revert yamon_getenv() so it returns char *. While this is suboptimal, it is
the only convenient way to use the returned value with numerous library
routines which have not been altered to properly use constified char *.

This was found to be necessary when I extended yamon to hold a string
describing a video mode for use with my experimental radeonfb.
2006-07-13 21:06:18 +00:00
simonb
b015b6a9f1 Use "#define<TAB>". 2006-04-06 06:17:32 +00:00
gdamore
e0103fb04c Use const char * in yamon_print(). 2006-03-21 21:49:47 +00:00
gdamore
0cf592aa8a au_icu.c is in mips/ and should not depend on evbmips intr handler struct.
convert various u_int32_t to preferred uint32_t.
2006-02-09 18:03:12 +00:00
gdamore
067008df2a paddr_t should be 64-bits wide to accomodate full R4K 36-bit phys address.
(Alchemy needs it for various system peripherials located above 4GB.)
2006-01-30 23:57:51 +00:00
christos
95e1ffb156 merge ktrace-lwp. 2005-12-11 12:16:03 +00:00
yamt
ba38016298 implement splraiseipl() for the following ports.
evbppc, evbmips, evbsh3, hp700, mac68k, vax, x68k.
2005-11-27 14:01:45 +00:00
tsutsui
e54d906c60 Add empty <machine/wired_map.h> for the MI mips/wired_map.c. 2005-11-05 09:54:48 +00:00
dyoung
a37289db57 Make disklabel(8) and fdisk(8) into "host tools " last step: build
and install ${TOOLDIR}/bin/${MACHINE_GNU_PLATFORM}-disklabel,
${TOOLDIR}/bin/${MACHINE_GNU_PLATFORM}-fdisk by "reaching over" to
the sources in ${NETBSDSRCDIR}/sbin/{disklabel fdisk}/.

To avoid clashes with a build-host's header files, especially on
*BSD, the host-tools versions of fdisk and disklabel search for
#includes such as disklabel.h, disklabel_acorn.h, disklabel_gpt.h,
and bootinfo.h in a new #includes namespace, nbinclude/.  That is,
they #include <nbinclude/sys/disklabel.h>, <nbinclude/machine/disklabel.h>,
<nbinclude/sparc64/disklabel.h>, instead of <sys/disklabel.h> and
such.  I have also updated the system headers to #include from
nbinclude/-space when HAVE_NBTOOL_CONFIG_H is #defined.
2005-06-12 19:46:15 +00:00
he
2f5d3f6059 Adapt to compiling with -Wcast-qual by adding consts where appropriate. 2005-06-09 21:43:13 +00:00
kleink
7b3b647647 Factor out W{CHAR,INT}_{MAX,MIN} into their own header file. 2004-05-08 21:51:47 +00:00
simonb
eb24c3d567 Add a function to query YAMON for the CPU frequency, and set up the
parameters for delay() from this.
2003-10-27 23:41:42 +00:00
agc
aad01611e7 Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
2003-08-07 16:26:28 +00:00
tsutsui
71ef8e5915 Use common mips/softintr.c for softintr(9) on evbmips.
Ok'ed by simonb.
2003-05-25 14:08:19 +00:00
hpeyerl
4a1358aecb add defines for high/low level triggered interrupts (need this in au_icu.c) 2003-04-01 17:34:10 +00:00
nakayama
e3e4805068 Replace machine/rnd.h with more appropriate name to share it
with cycle counter based microtime in kern/kern_microtime.c.
2003-02-05 13:57:50 +00:00
thorpej
23bc250391 Merge the nathanw_sa branch. 2003-01-17 21:55:23 +00:00
lukem
0635de35a3 Remove KDIR=, since SYS_INCLUDE=symlinks and KDIR are not supported any more. 2002-11-26 23:30:07 +00:00
simonb
8ae9336efc Keep the knowledge of the H/W interrupt 5 event counter local to
interrupt.c.  This change also unmasked the fact that the Alchemy
boards did not initialise this counter.
2002-11-10 15:21:51 +00:00
simonb
63096043b3 Use "#define\t" instead of "#define ". 2002-09-22 08:30:56 +00:00
briggs
0b956d0b8b Implement pmc(9) -- An interface to hardware performance monitoring
counters.  These counters do not exist on all CPUs, but where they
do exist, can be used for counting events such as dcache misses that
would otherwise be difficult or impossible to instrument by code
inspection or hardware simulation.

pmc(9) is meant to be a general interface.  Initially, the Intel XScale
counters are the only ones supported.
2002-08-07 05:14:47 +00:00
simonb
c61cf25192 Remove prototype for non-existant softintr_dispatch().
Add/modify a few comments.
2002-07-29 16:14:05 +00:00
simonb
99eb5608ad Don't install intr.h isa_machdep.h pci_machdep.h rnd.h for userland. 2002-07-29 15:52:46 +00:00
simonb
00f3022be0 Remove unused MCLOFSET define. 2002-07-11 13:36:45 +00:00
simonb
97f56c7642 Don't install <machine/rnd.h>. 2002-06-06 03:30:56 +00:00
simonb
6b6e4f4f60 Simplify include files that just include <mips/locore.h>. 2002-06-05 06:18:34 +00:00
simonb
769775ceb4 Make clock/time handling more accurate:
- Use the CPU count register for more accurate microtime (from
   sbmips) and delay (based on an evbmips delay function) functions.
 - Schedule the next hardclock interrupt more accurately (from
   an sgimips patch by Rafal Boni).  Clock drift on one board is
   now ~7ppm instead of ~330ppm.
 - Purge old pmax-based mcclock code.
 - Correctly round off some clock-derived variable calculations.
XXX: Some of this code should be migrated to sys/arch/mips.
2002-04-08 14:08:25 +00:00
simonb
00e905ce64 Use <mips/isa_machdep.h> and <mips/pci_machdep.h>. 2002-03-18 10:10:14 +00:00
simonb
9690c2293e Convert to use <mips/bus_*.h>. 2002-03-18 01:21:11 +00:00
simonb
a85e214bda Make sure that private DMA flags don't overlap with standard DMA flags;
start these at 0x10000 to leave room for an increase in the latter.
2002-03-17 21:45:06 +00:00
simonb
189fba2bc0 Add ecoff_machdep.h for userland usage. 2002-03-13 05:03:18 +00:00
simonb
31e40c8ce1 A port to the MIPS Malta evaluation board. Currently supports the
MIPS32 4Kc CPU board, with support for the MIPS64 5Kc and the QED RM5261
CPU boards to follow.

The cs4281 audio hasn't been tested, there are some interrupt problems
with onboard the pciide, but all other on-board peripherals work.

The evbmips port will support more MIPS evaluation boards in the future.
2002-03-07 14:43:56 +00:00