Commit Graph

22 Commits

Author SHA1 Message Date
itojun 6123043789 pass string length (= boundary info) to pci_devinfo so that we do not run over
the end of memory region
2004-04-23 21:13:05 +00:00
he 20a53a5841 Fix uninitialized error in pcib_print(). 2003-11-02 22:03:42 +00:00
lukem 6fdfc66c57 add __KERNEL_RCSID() 2003-07-14 22:57:46 +00:00
thorpej 41a403fb33 Use aprint_normal() for cfprint() routines. 2003-01-01 00:35:30 +00:00
thorpej 47c14a34bc Fix script-o's in last. 2002-10-02 03:36:20 +00:00
thorpej 5a9ddc1422 Use CFATTACH_DECL(). 2002-10-02 02:21:20 +00:00
thorpej 9a711d6985 Declare all cfattach structures const. 2002-09-27 20:29:02 +00:00
simonb d9e75e198e Fix typo in mmap hander. 2001-10-20 05:56:35 +00:00
thorpej 81bcece4d4 Implement bus_space_mmap(). 2001-09-04 16:32:42 +00:00
thorpej 0c37c9e860 Check in work-in-progress of P-6032 support. This is not tested,
but is meant for back-up purposes.
2001-06-22 06:02:54 +00:00
thorpej b440db94e8 Fill in one P-6032 snippet. 2001-06-22 04:33:26 +00:00
thorpej b5443137f0 Only call through the function pointer if it's not NULL. 2001-06-22 01:42:20 +00:00
thorpej 1ce7119f17 More ISA interrupt rototilling. I get *some* interrupts on a:
we1 at isa0 port 0x300-0x31f iomem 0xcc000-0xcffff irq 10
we1: WD8013WC Ethernet (16-bit)
we1: Ethernet address 00:00:c0:94:f6:72

...but still nothing on the PCIC.
2001-06-21 19:00:18 +00:00
thorpej f341043437 Rototill ISA interrupt code. In particular, I have remembered most
of the horror that is the 8259 PIC.

PCMCIA interrupts still not working yet, but getting closer.
2001-06-21 05:20:54 +00:00
thorpej e51a043945 Yet more interrupt cleanup -- the platform mater interrupt establish
function now just takes an "irq", which is an index into the irqmap
table for that platform.
2001-06-15 04:01:39 +00:00
thorpej fe87c9aade When the old PCI address map is in use, disable I/O space. Also disable
I/O space on PBC revs < B2.
2001-06-14 18:52:26 +00:00
thorpej 80dfaa3e5a Read the PCI memory space base and the PCI DMA window base from the
V3 PBC, and use them in the bus mem tag and the bus dma tag on the
P-4032.  This allows us to get much further when PMON has configured
the PBC using the old-style PCI address map.
2001-06-14 17:57:26 +00:00
thorpej be7629b7e0 Hand off intr evcnt responsiblity in a reasonable way on the 5064. 2001-06-10 09:28:26 +00:00
thorpej 7c074dc806 Check in work-in-progress of generic ISA interrupt support. The
goal here is to get the P-5064 PCMCIA slots working, and serve as
the basis for P-6032 interrupt support.

PCMCIA interrupt auto-detection not working -- more work to be
done here.
2001-06-10 09:13:06 +00:00
thorpej 23a3dc1508 If a bus doens't want to use an extent, don't force it to. 2001-06-01 15:57:31 +00:00
thorpej c702830c42 The P-4032 has no ISA bridge/bus, so remove all P-4032 conditionals. 2001-06-01 15:20:06 +00:00
thorpej 16b9c60621 A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU).  There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.
2001-05-28 16:22:13 +00:00