* Rename TARGET_ATPCS_STACK_ALIGN to TARGET_ATPCS.
* Move APTCS aggregate return rules to arm_return_in_memory(), conditional
on TARGET_ATPCS, and make it also return true for variable-sized aggregates.
* Declare arm_arch5 and arm_arch5e. Set arm_arch5 for if -mcpu=arm10tdmi,
-mcpu=arm1020t, -mcpu=xscale, -march=armv5, -march=armv5e, -march=armv5te.
Set arm_arch5e for -mcpu=xscale, -march=armv5e, -march=armv5te.
arm.md:
* Define the "clz" insn for arm_arch5.
* Define an "ffssi2" expander for arm_arch5 which uses "clz".
The GCC ChangeLog does not have a complete description to quote here,
so:
arm.c:
* arm_override_options(): Set arm_is_scale according to the the
-mcpu=xscale option. Set arm_constant_limit to 2 if arm_is_xscale.
* arm_adjust_cost(): If arm_is_xscale, account for stalls that can
occur due to shifted operands.
* arm_gen_load_multiple(): Account for the cost of ldm vs. ldr if
arm_is_xscale.
* arm_gen_store_multiple(): Likewise for stm vs. str.
arm.h:
* CONSTANT_ALIGNMENT(): Use a constant alignment factor of 2 if
arm_is_xscale.
* MOVE_RATIO: Set to 4 if arm_is_xscale.
arm.md:
* Add XScale scheduling parameters.
* Define a "shift" attribute (used by arm_adjust_cost()) and give it
to the appropriate operands on andsi_not_shiftsi_si, *shiftsi3,
*shiftsi3_compare0, *shiftsi3_compare0_scratch, *notsi_shiftsi,
*notsi_shiftsi_compare0, *not_shiftsi_compare0_scratch,
abssi2, *neg_abssi2, extendsidi2, *cmpsi_shiftsi, *cmpsi_shiftsi_swp,
*cmpsi_neg_shiftsi, *arith_shiftsi, *arith_shiftsi_compare0,
*arith_shiftsi_compare0_scratch, *sub_shiftsi, *sub_shiftsi_compare0,
*sub_shiftsi_compare0_scratch, *if_shift_move, *if_move_shift,
and *if_shift_shift.
treated like -march=armv4t, but which generate __ARM_ARCH_5__,
__ARM_ARCH_5T__, and __ARM_ARCH_5TE__ defines, respecitively.
* Add -mcpu=xscale, which is internally treated like -mcpu=strongarm,
but which generates __ARM_ARCH_5TE__ and __XSCALE__ defines.
These command-line options and definitions are consistent with gcc 3.x,
and allow NetBSD Makefiles to use them in a forward-compatible way, and
also give hand-tuned source code (e.g. assembly) a chance of tuning for
XScale.
(alpha_expand_unaligned_load, alpha_expand_unaligned_store):
Cast switch operand of size to int.
Fixes one 32-bit host cross-compile problem, but still doesn't work...
compare_addsi2_op0 & compare_addsi2_op1. From the comment I've just
inserted:
;; XXX RWE: The reload pass of GCC-2.95 makes a mess of these if one of the
;; arguments is, or is directly derived from, an eliminable register. In
;; that case reload will substitue into the PLUS and then canonicalize it
;; without regard to the the match_dup parts. Since these are rare, I've
;; disabled them for now, but they should be OK in 3.x (which manages the
;; substitution without canonicalization.
Fixes PRs port-arm/16424 and toolchain/16304.
> 2000-03-06 Clinton Popetz <cpopetz@cygnus.com>
>
> * config/sh/sh.c: (barrier_align): Handle a delay slot that is
> filled with an insn from the jump target.
> Fix pcrel too far problems due to upping CACHE_LOG on SH2:
> * sh.c (barrier_align): Don't return early for normal branch/barrier
> when optimizing for SH2.
> 2000-09-19 Bernd Schmidt <bernds@redhat.co.uk>
>
> * final.c (insn_current_reference_address): Use INSN_SHUID of seq
> rather than that of branch.
> (shorten_branches): Don't increment insn_current_address twice.
> Wed Feb 23 16:42:21 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
>
> * final.c (shorten_branches): Make value passed to LOOP_ALIGN
> conform to documentation.
> gcc original rev. 1.89:
> * combine.c (if_then_else_cond): If comparing against zero,
> just return thing being compared.
>
> gcc original rev. 1.132:
> * combine.c (combine_simplify_rtx): Don't create an if_then_else
> unless both args are general_operand.
* Use <dbxelf.h>.
* Undef CPP_PREDEFINES before defining it.
* Remove the undef of HANDLE_SYSV_PRAGMA; we need this in order for
weak externs to work properly.
