Drochner's work made in nisimura-pmax-wscons branch. Still a little
to do before useful for DECstation. MI softintr required.
- allow wildcard matchs to have zstty/zskbd/zsms in default hardware
configuration.
- abandon to check zs_ioasic_cnattach() return value; it doesn't fail.
- have zs_ioasic_cnattach() serial line parameters hardcoded inside, in
symmetry with zs_ioasic_lk201_cnattach().
16 bit sun checksum. This flag is needed when making iso 9660 images which
are bootable on both sparc and pmax machines.
this addresses PR port-pmax/10929
machines are one is very likely to run into SES units (what with all
the D1000's && A1000s out there now). I'll do it in sparc64 as soon
as I get that running for myself.
Because of this kvtophys() of wired pages did set the leftmost bit, causing
the pager to hang while swapping. This is now fixed by using another
free bit in the PTE as wired bit instead.
This fixes PR#11121.
Many thanks to Chuck Silvers that found what the problem was!
the UPC driver needs to know whether the system's got an IOEB in it.
The way this is implemented is a mess -- I need to get my mind round
autoconfiguration again.
serial console even if the PROM uses bitmap console.
- Remove zs_hwflags since news68k does not have keyboard nor mouse at zs;
check zschan address set in zscninit() to detect console device.
- Use BPS_TO_TCONST() to set baudrate in zs_init_reg[].
- Remove zs_get_chan_addr(), which is not needed anymore.
without MII. It supports 100BaseTX only. Half duplex/Full duplex can
be specified manually, but there are no auto negotiation functionality.
XXX: It takes 34 seconds before sending/receiving packets on the wire
after initial setup. It is obviously a bug because the board
just works fine on NEWS-OS, but I cannot find what's wrong...
Once it starts working, it seems there are no problems.
for each driver to indicate the interrupt has been handled or not.
add prototype of apbus_dmatag_init() function, which allocates memory
and initialize its member including bus space handle to flush DMA write
cache. Note that the allocated pointer must be freed.
Clear interrupt mask for specified interrupt in apbus_intr_establish().
Add dma stuff; define apbus_dmamap_sync() to flush DMA write cache by
accessing the corresponding I/O port.
pmap_enter() cannot allocate the segmap return failure if PMAP_CANFAIL
instead of sleeping. Otherwise panic. Both alpha and i386 do this. Do
not pmap_enter_pv() until after this is done so the data structures are
not partially allocated. This should prevent pmap_page_protect() from
getting stuck when called from pagedaemon.
flags in the bootpath: only treat the rest as boot flags if the '-'
follows whitespace (space or tab)
This should fix the "boot disk4 netbsd-20001004-RFHS8036" lossage
Hubert Feyer pointed out in private e-mail.
Tested by: jdolecek (userland version)
Reviewed by: eeh
for mips_read_statusreg (which was apparently never implemented).
Provide prototypes and implementations for mips_cp0_cause_write,
mips_cp0_status_read, and mips_cp0_status_write. (Writing can, of
course, be quite dangerous.)
with a MIPS4 option at this point -- all the code except for one single
spot is conditionalized with MIPS3. So, don't even pretend about
MIPS4 for now, until it all gets cleaned up.
for mips3 (and later) 'ld' and 'sd' instructions. These currently
only are properly implemented for the _MIPS_BSD_API_LP32 and
_MIPS_BSD_API_LP32_64CLEAN 'API's. They're pretty messy, but when you
need them, you really need them.
pseudo-device pty 2 # pseudo-terminals (Sysinst needs two)
(Some installers may not be using sysinst, in which case this just reduces
the number of ptys from 16 that are not used to 2 that are not used)
For i386 conf files, no change other than comments.
apm was enabled in the wrong file, it's not needed in INSTALL_LAPTOP,
but should be there in GENERIC_LAPTOP.
wss0 at isa irq 10 may cause conflicts on some laptops; remove it.
Despite its name, PCIBIOS_INTR_GUESS is safe option, so enable it.
- just copy from bivideo.
- erase WindowsCE hardware cursor initialy.
- LCD power management codes exist, but currently disabled.
Because some devices(include ite8181) confuse after LCD power turn on.
WorkPad z50 power unit seem to be very weak
- just copy from bivideo.
- erase WindowsCE hardware cursor initialy.
- LCD power management codes exist, but currently disabled.
Because some devices(include ite8181) confuse after LCD power turn on.
WorkPad z50 power unit seem to be very weak,
ports aren't supported for installation), MFS, slip and ppp. There
was no room for pppd and slattach on the "tiny" floppies anyway, so
there was nothing to use them.
Add pcic at isa, pcmcia, wdc at pcmcia, and 'wireful' cards @ pcmcia
(ne, ep, mbe, sm). Installing is now possible on a 4M laptop over
ethernet (tested with ep at pcmcia, and 640+3200 available memory).
now makes use of lockmgr(). Since we broke into the debugger from an interrupt,
we don't have a curproc, so when lockmgr() tries to find our PID it barfs,
causing another break into DDB which then calls the mysterious code that
calls lockmgr() again.....
So set doing_shutdown while we're in DDB so lockmgr ignores locks.
grf-type consoles (wscons). Config_console() is now called from consinit(),
just after setting up the kernel msgbuf, so debugging is easy(er).
To further facilitate this move, the pcibus now allows for early-console
attaches by allocating static bus_space_tags (no mallocs possible at this
point).
can not cross a page boundary. This fixes a problem when a dump(8) buffer
just crossed a page boundary and bus_dmamap_load() would coalesce the
the overlap onto the first segment. The NEXTPTR value would get set to
-1 when starting the DMA transfer and the residual data for unaligned
transfers would be copied to physical address 0x1ffffffc. On the R3000,
this would result in corrupted data, and on the R4000 would usually result
in a hard system hang.
both the primary and the secondary caches. MachFlushDCache() will not
invalidate the correct secondary cache lines for KSEG2 addresses.
R4000 systems should now be able to boot and run.
addresses, it makes sense to print the actual address of the device rather
than the original address. The latter is useful to distinguish the type
of device only, so we maintain that data internally (as we always have).
This closes PR 10557 from Dave Huang.
you do not save it and pass it along in rval the system will start
to fail running user programs. This finishes the suggestion by cgd to
not save some registers on syscall entry.
we have to poke the data structures directly to force the offset we need.
The open() function returns with the address of the IO control block in
register t0 so we take a copy of it for our brute-force lseek function.
This should be reasonably portable since the firmware writers closely
follow UNIX semantics and the open stubs should recompile and use the
same registers. May break on the rebadged clones -- buyer beware.
The alternative is to use dummy reads to go forwards and reopen followed
by dummy reads to go backwards. It takes around 60 seconds to boot
using this method if we use a clean filesystem.
Tested with firmware versions 5.40 and 5.43
Check the first partition type in devopen(), and if it is of type
FS_RAID, add 64 to blkdev_part_offset.
NOTE: This brings the size of the alpha first-stage bootblocks up to
close to the maximum. RAID1 support is controlled by the
BOOTXX_RAID1_SUPPORT define, and is easy to disable if size
becomes an issue.
based on it working already for macppc.
Also add commented out:
#options VNODE_OP_NOINLINE # Don't inline vnode op calls
#options NFS_V2_ONLY # Exclude NFS3 and NQNFS code
as suggestions for additional savings
maps standard boot flags to corresponding RB_* values
use BOOT_FLAG() in port's MD code as appropriate
as discussed on tech-kern, add new boot flags -v, -q for booting
verbosely or quietly, and corresponding AB_VERBOSE/AB_QUIET
boot flags; also add FreeBSD-compatible bootverbose macro and
NetBSD-specific bootquiet macro
for hpcmips, use new bootverbose instead of it's own hpcmips_verbose
Tested on i386, and to limited extend (compile of affected files) also for
mvme68k, hp300, luna68k, sun3.
* All of pmap_init is now deferred to the first call of pmap_create. This
allows us to allocate stuff dynamically using malloc.
* pv_table (which is needed before malloc is available) is temporarily
allocated using pmap_steal_memory in pmap_bootstrap, and then
re-allocated using malloc in pmap_create, with the old allocation being
given back to UVM. This should save some memory on small machines, but
the malloc overhead probably soaks it up.
the fmovecr constant table has the internal format
of the constants. So, when changing the mantissa size by a
non-multiple of 32 bits, we'd have to change this table, too. As
all other code changes just chopped of the least significand
32bit word of the mantissa, we correct the mantissa size instead
to (115 - 32 == 83) bits.
fpu_fmovecr.c:
put a safety belt in, to catch the next person who doesn't know this.
fpu_int.c:
in one place, the reduction of the mantissa size was overlooked.
fpu_log.c:
as the most significand 32bit word of the mantissa was changed back to the
old format, change back the table indexing code, too.
This should fix PR 11045.
indeed tagged with ASM and the ASN, "per the Alpha architecture".
It is therefore safe to cancel any pending lazy I-sync on a
given CPU when a new ASN is assigned on that CPU.
that the page being zero'd was not completed and that page zeroing
should be aborted. This may be used by machine-dependent code doing
slow page access to reduce the latency of running a process that has
become runnable while in the middle of doing a slow page zero.
backend.
The VME2chip can use this to translate a VMEbus irq to a cpu irq.
The VMEchip (on mvme147) can't deal with the VMEbus irq and cpu irq
being different so we just panic in that case for now.
respond in the allotted time if they're told to TALK immediately after
completing a LISTEN command. Experimentation with adb_op_sync() yielded
consistent results when the timeout was increased from the documented
6900 usec to 8000 usec, so we'll make that change here.
(Accurate and complete documentation of the hardware sure would help...)
and a front-end driver for the Ether3. Only semantic change is to remove
ea_claimirq() and ea_releaseirq() on the grounds that the seem too spurious
to warrant a callback to the front-end.
in the MIPS prom loader we have to be very careful how the sections are
ordered and the number of sections defined. For this reason the standard
linker scripts cannot be used.
The exact rules don't appear to be documented and a little experimentation
is required.
and alpha ports.
Uses PROM standalone I/O functions but due to the lack of a lseek function
it currently only works with version 5.40 of the firmware. A more portable
solution is being worked on.
installboot utility requires several changes in order to correctly install
the bootstrap code - there is a "volume directory" which contains a list
of filenames, start sectors and length. We need to add a "boot" entry of
the correct length starting at block 2. The boot file has to be ecoff
which means we waste another 0.5k
Normally the Mips filesystem has a ~500k partition for this purpose but it
should be possible to squeeze it all into the first 7k "BSD Style" (1k is
required for 2 different copies of the partition table)
Only the bootxx_ffs first stage bootstrap has been tested via bootp() which
loads the second stage off disk and then boots the kernel.
in syscall() anymore. By defition, processor was in SR_INT_IE turn
on prior to have syscall exception. MIPS1 assembler hook arranges
to enable the bit for its own. MIPS3 does the same effect by
turning off EXL bit.
fact the direct mapped cache makes address alias effect.
- Just turn on processor master interrupt mask IEc (SR_INT_IE) bit prior
to call syscall() kernel entry point. IEp is always 1 in this case
by defition.
and data cache sizes). R4000 uses 2^(12+IC) and 2^(12+DC). IDT32364
uses 2^(9+IC) and 2^(9+DC).
abstract around the problem by making the base a parameter to the
MIPS3_CONFIG_CACHE_SIZE macro. we pass the base down from mips_vector_init
to mips3_vector_init and to mips3_ConfigCache (where it is used).
XXX: someone with an MIPS3_4100 should switch to this and get rid
of the ugly ifdefs in cpuregs.h
- Don't fall into infinite loop even if the # of iteration necessary isn't 1.
- Don't interpret lower 8bit of AL, which is # of iteration, as a descriptor.
w/ Chuq Silvers. Fixes a panic when a program with wired pages that
has run for a long time when the system is under heavy memory load
exits (specific case was ntpd, reported by Simon Burge).
routine. Works similarly fto pmap_prefer(), but allows callers
to specify a minimum power-of-two alignment of the region.
How we ever got along without this for so long is beyond me.
a whole 0.01us in lmbench lat_syscall null on our 250Mhz QED system.
$at is still saved just to be safe, although it looks like it does
not need to be. $v1 is used in syscall(), although I'm not sure why.
process's segtab, retiring 'pcb_segtab' field from 'struct pcb'.
This would be another MULTIPROCESSOR unfriendly and the necessity
might be eliminated when the way to hold PTE is redesigned.
