- NBPD_* macros are set to the types that better match their architecture
(UL for i386 and amd64, ULL for i386 PAE) - will revisit when paddr_t is
set to 64 bits for i386 non-PAE.
- type fixes in printf/printk messages (Use PRIxPADDR when printing paddr_t
values, instead of %lx - paddr_t/pd_entry_t being 64 bits with PAE)
- remove casts that are no more needed now that Xen2 support has been dropped
Some fixes are from jmorse@ patches for PAE.
Compile + tested for i386 GENERIC and XEN3 kernels. Only compile tested for
amd64.
Reviewed by bouyer@.
See also http://mail-index.netbsd.org/tech-kern/2010/02/22/msg007373.html
code to override the default pci(9) behavior by creating a non-NULL
pci_attach_args_t (on x86, pci_attach_args_t is always NULL) containing
one or more non-NULL function pointers.
and non-const types, and the kernel uses both const and non-const
PMF qualifiers and device suspensors, so change the pmf_qual_t and
device_suspensor_t typedefs from "pointers to const" to non-pointer,
non-const types.
pci_chipset_tag *pci_chipset_tag_t' for an improvement in type safety.
(Back when I did the same for cardbus_chipset_tag_t, it helped to turn
up some bugs!)
three registers. Let us think of the kernel operating the registers
in two steps:
1) Select: enable configuration cycles and select a range of
configuration-space addresses.
2) Access: read or write a word in PCI configuration space.
To make the steps more explicit, extract some helper subroutines
from pci_conf_read(9) and pci_conf_write(9):
pci_conf_selector(tag, reg): from a pcitag_t and a register offset,
create a word that enables configuration cycles and selects a
configuration address range.
pci_conf_select(w): for `w' a word created by pci_conf_selector(),
enable configuration cycles and select the address range indicated
by `w'.
pci_conf_select(0): disable configuration cycles.
pci_conf_port(tag, reg): map a pcitag_t and a register offset to an I/O
port where the configuration access should occur.
While I'm in here, change the panic(9) calls to panic("%s: ...",
__func__) instead of hard-coding a subroutine name.
native i386 by using PDP_SIZE
- introduce pmap_unmap_apdp(), used to clear the APDP entries in PD, and
replace the relevant code parts with this function.
Comes from Jeremy Morse's patch for i386 PAE support. Adjustments by me.
that initializes pci_mode, which I have moved to the top.
Make pci_mode private to pci_machdep.c.
Provide pci_mode_set() for pcibios.c to configure the PCI Configuration
Mechanism. KASSERT() in pci_mode_set() that the mechanism is not
changing from anything but the "don't know" value, -1.
pinning/unpinning, set_ldt, invlpg) operations cannot be queued in the
xpq_queue[] any more, as they use their own specific hypercall, mmuext_op().
Their associated xpq_queue_*() functions already call xpq_flush_queue()
before issuing the mmuext_op() hypercall, which makes these xpq_flush_queue()
calls not necessary.
Rapidly discussed with bouyer@ in private mail. XEN3_DOM0/XEN3PAE_DOM0 tested
through a build.sh release, amd64 was only compile tested. No regression
expected.
The first level of the temporary page mappings are also done in the first
iteration of the loop below, so no need to do it before.
ok by joerg@ in private mail.
differentiates different CPUs within a given model type (i.e. model 0xe with
extended model 0x1 is NOT the same as a model 0xf).
Modern Xeons do not support MSR_IA32_EXT_CONFIG, so use model and extended
model correctly to avoid it
for memory between 16M and 4G. On large memory machine, this avoids
the 32bit-accessible memory being eaten by various kernel early allocation,
causing 32bit bus_dma(9) memory allocation to fail at boot time.
Tested on a system with 48GB RAM; based on netbsd-5 patch proposed on
port-amd64 3 days ago.
