Commit Graph

9 Commits

Author SHA1 Message Date
lukem
141727280b __KERNEL_RCSID() 2003-07-15 01:31:38 +00:00
fvdl
7dd7f8baa2 Handle 64bit DMA addresses on PCI for platforms that can (currently only
enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.
2003-06-15 23:08:53 +00:00
thorpej
1132348b98 Use aprint_normal() for cfprint routines. 2003-01-01 01:24:19 +00:00
thorpej
bd5bb4652b Add trailing ; to CFATTACH_DECL 2002-10-02 15:45:10 +00:00
thorpej
f59e5352f2 Use CFATTACH_DECL(). 2002-10-01 04:21:32 +00:00
thorpej
9a711d6985 Declare all cfattach structures const. 2002-09-27 20:29:02 +00:00
thorpej
6c88de3b53 Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller.  Use it
rather than invoking cfattach->ca_match directly.
2002-09-27 03:17:40 +00:00
thorpej
204183c0fa * Add "pcitag_t *pba_bridgetag" to pci_attach_args. This is set to
NULL for root PCI busses.  For busses behind a bridge, it points to
  a persistent copy of the bridge's pcitag_t.  This can be very useful
  for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
  uses OFW device nodes to enumerate the bus.  When a PCI bus that is
  behind a bridge is attached, pci_attach_hook() allocates a new PCI
  chipset tag for the new bus and sets it's "curnode" to the OFW node
  of the bridge.  This is used as a starting point when enumerating
  that bus.  Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.
2002-05-16 01:01:28 +00:00
simonb
31e40c8ce1 A port to the MIPS Malta evaluation board. Currently supports the
MIPS32 4Kc CPU board, with support for the MIPS64 5Kc and the QED RM5261
CPU boards to follow.

The cs4281 audio hasn't been tested, there are some interrupt problems
with onboard the pciide, but all other on-board peripherals work.

The evbmips port will support more MIPS evaluation boards in the future.
2002-03-07 14:43:56 +00:00