long standing issue with interrupts onthe PowerStack E1. Remove the
quirk entry for the PowerStack E1 and revert to using the IVR.
Also, add a \n to the attachment of the mk clock printf that was missing.
out how to properly reboot these machines, instead we make use of the
auto-poweron-alarm time, and power cycle the machine to simulate a
reboot. This is a hack, but until I get documentation on these machines,
at least you will be able to reboot them.
2) Modify pnpbus attachment code to record the chipid of the device if it
has one.
3) Change the clock probes to use the chipid, rather than relying on
potentially untrustworthy subtype and interface.
4) Add decoding of memory ranges to the RESIDUAL_DUMP code.
5) Add a we@pnpbus device to allow netbooting and root device detection
from an IBM we ethernet. (it will only work if your firmware detects it)
6) Because I moved the pnpbus probe to occur prior to pci and isa, it
screwed up the root device detection and firmware path building code.
Completely rewrite the fw-path detection code to deal with this.
residual with the pnpbus probes, than it is to do it with raw isa probes,
so I've replaced the isa mkclock and mcclock code with a pnpbus attachment.
While writing the mkclock code, I realized that on motorola prep machines
the mkclock uses the same port range as the nvram part. (it's actually
the same chip/part). This was causing the nvram not to work on those
machines. Now the nvram code will recognize this, and wire up the
mkclock as well. The mkclock probe is just a stub probe used to
pre-detect the fact that this is one of those machines.
1) The E1 seems to have the int. siop wired to irq 14-level and the internal
wdc wired to irq 14-edge. special case and fail the wdc probe on E1's.
2) If we fail to map the NVRAM registers, return, rather than trying to talk
to them and panic'ing the box.
3) revert my previous "fix" to pnpbus to make irq's default to level. It
was wrong, and didn't even fix the powerstack.
With this, we have limited PowerStack E1 support. The machine cannot
talk to it's IDE controller, and cannot detect it's boot device
automatically, but it does come up and run. Tested with NFS root.
1) Add the NVRAM device. This device allows us to speak with the nvram on
prep-based machines and read/write to it. Also add a simple IOCTL
interface for speaking with the nvram from userland. This hasn't been
tested yet, but eventually I plan to support it with the sparc eeprom
command.
2) Change the root device detection to use the nvram device to attempt to
guess the boot device. Most machines should now correctly guess thier
boot device, though I expect a few devices to still not work quite right yet.
3) change the default IRQ to level rather than edge in the pnpbus if the
flags are invalid or empty. (based on output from a PowerStack E1)
4) correctly handle older machines in pnpbus that have FixedIOPorts
rather than variable ones.
Still have much to do.
1) create new pnpbus psuedo bus. This is a bus layer that reads the PNP
tree from the residual data and allows attachment of devices with the
information given therein. Based loosely on i386/pnpbios.
2) Delete obio bus, as with the pnp bus we no longer need it.
3) Create a number of functions that gather the information needed to set
up the machine from the residual data, rather than hardcoding it in.
4) Create a quirk table for machines that are bizzare enough that the
residual information is not sufficient. (such as the 6015)
5) Using the data gathering routines and the quirk table, delete struct
platform completely from the architecture. Prep is now almost completely
dynamic in figuring out the machine it is running on and setting things
up properly.
6) Add a wdc_pnpbus driver which attaches the wdc controller found on
some 7248's and the 6015. This replaces the now-defunct wdc_obio.
7) delete all the mot_* and ibm_* files, and replace them with a single
ibm_machdep.c which only contains the quirk functions for the 6015 and
the 6050.
8) Modify GENERIC to work with all this stuff.
garbled