if not, fallback to VOP_READ and VOP_WRITE. This makes vnd work with files
on, e.g. tmpfs and smbfs; all file systems should behave as before.
OK'ed by silence in tech-kern@.
- split mkclock attachment from sparc64/clock.c into dev/mkclock.c
(now clock.s only contains clock interrupt and timecounter stuff)
- rename match/attach functions of rtc at ebus to match the device name
- update some comments around clock devices in GENERIC
No objection on port-sparc64 for a month.
- Remove useless (thanks to COMPAT_XX behaviour) #ifdefs in
syscalls.master
- Make netbsd32_compat_43.c compiled per COMPAT_LINUX32 because the latter
needs stuff from it.
Fixes Perry's PR#34951.
operation. These all match the behavior exposed by MFS (except for a
corner case that is described in t_link).
Fixes to tmpfs itself to make these tests pass will come soon.
"The Certance CP3100 product family provides high-end disk-to-disk-to-tape
(D2D2T) functionality for small-to-medium businesses."
To software, the unit is very similar to the IQ80321 and IQ31244 eval
boards from Intel. As such, we share almost all of their code.
Onboard hardware:
- IOP321 XScale CPU. Core clock is 600MHz.
- 256MB SDRAM (not sure if that's true for all)
- Four-port Intel i31244 SATA controller. One port is connected to the
internal disk. The remaining three are available on the back-panel.
- Dual GigE ports on the back panel, using an Intel i82546EB controller.
- Two Symbios Logic 53c1010 SCSI controllers, one in host mode the other
in target mode. Both SCSI busses are available on the back panel.
Note that NetBSD does not support SCSI target mode.
- 8MB of NOR Flash, containing a fairly vanilla Redboot together with
a minimal compressed Linux image.
- Some front-panel LEDS (not supported).
- Serial console.
Contributed by Wasabi Systems, Inc.
devices hooked up to the HPI pin.
HPIs cannot be masked at the interrupt controller; they can only be masked
by disabling IRQs in the XScale core. To deal with this, we tweak the
interrupt frame so that IRQs are disabled when the interrupt dispatcher
returns due to a masked HPI interrupt. IRQs will be re-enabled by a
subsequent splx(9).
Fortunately the only instance where HPI is used is for the console UART
on a couple of boards, so this hack does not adversely affect performance.
Contributed by Wasabi Systems.
christos