Commit Graph

10 Commits

Author SHA1 Message Date
thorpej
6c9c7f3b21 Garbage-collect prev_intr_depth; nothing uses it. 2003-01-02 23:54:39 +00:00
briggs
458f8dc093 Restore .Lpmc_intr_return -- ben only removed one of two references to it. 2002-10-25 14:29:37 +00:00
bjh21
2a89b96077 Pull down rev 1.7.2.1 [must be careful which branch I commit to!]:
Reinstate .Lextirq_return: it was used in two places, and I only removed one
of them.
2002-10-21 18:09:18 +00:00
bjh21
d599df9587 Continue the " - . - 8" purge. Specifically:
add	rd, pc, #foo - . - 8		->	adr	rd, foo
ldr	rd, [pc, #foo - . - 8]		->	ldr	rd, foo

Also, when saving the return address for a function pointer call, use
"mov lr, pc" just before the call unless the return address is somewhere
other than just after the call site.

Finally, a few obvious little micro-optimisations like using LDR directly
rather than ADR followed by LDR, and loading directly into PC rather than
bouncing via R0.
2002-10-14 22:32:50 +00:00
thorpej
7cbd25232f Use correct-for-ELF local labels. 2002-08-17 03:14:47 +00:00
thorpej
4706ae8670 Use cpsr_c rather then cpsr_all where appropriate. 2002-08-14 23:33:11 +00:00
briggs
0b956d0b8b Implement pmc(9) -- An interface to hardware performance monitoring
counters.  These counters do not exist on all CPUs, but where they
do exist, can be used for counting events such as dcache misses that
would otherwise be difficult or impossible to instrument by code
inspection or hardware simulation.

pmc(9) is meant to be a general interface.  Initially, the Intel XScale
counters are the only ones supported.
2002-08-07 05:14:47 +00:00
thorpej
d8eb148780 Clean up some comments. 2002-07-29 22:00:00 +00:00
thorpej
fea38885e8 * Interrupt status is in cp13.4, not cp13.1 (D'oh!)
* Fix an inverted test.
2002-06-25 19:40:46 +00:00
thorpej
e33cde5940 Add an IRQ vector to be shared by all i80200 applications. This
consults the interrupt source bits in the i80200 ICU and calls
a board-specific external IRQ dispatcher if an external IRQ is
pending.
2002-01-24 01:12:40 +00:00