e9d1fccd30
BWX-addressable space is aways linear, so always allow BUS_SPACE_MAP_LINEAR
...
requests to succeed (and ignore BUS_SPACE_MAP_PREFETCHABLE, since it makes
no difference in BWX-addressable space).
2001-09-16 03:50:01 +00:00
4ce0b90ae3
Typos, pointed out by Luke Mewburn (gee, I guess I built a kernel
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other than GENERIC).
2001-09-04 16:14:49 +00:00
102190b8fe
Implement bus_space_mmap().
2001-09-04 05:31:27 +00:00
8f20972db2
Revert previous -- we'll do it differently.
2000-11-29 06:21:12 +00:00
8ebabb1aae
Increase the number of static extent descriptors from 8 to 16,
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and add a means for calling a chip-specific init hook.
2000-11-29 05:53:29 +00:00
cc9dfe871b
Do the previously slightly differently, to avoid confusing the internal
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space extent maps. Pointed out by msaitoh@netbsd.org . (Someone should
send me an EV6 machine!)
2000-06-26 18:19:26 +00:00
9a2d9ff68b
Because of the Cool sign-extension hack we use to access PCI space,
...
the `get window' method ends up with the wrong physical address to
pass onto userspace (which wants to mmap the space).
Compensate by adding a CHIP_PHYSADDR() macro which un-hacks the address
suitably for mapping with other-than-KSEG.
2000-06-26 02:42:10 +00:00
13c9f8d398
implement bus_space_vaddr()
2000-04-17 17:24:48 +00:00
df88882d80
- Add a bus space method for getting the translation for a window.
...
- Add sysarch methods for "get bus window count", "get bus window",
and "pci conf read/write".
These are a hack, but they're what's necessary in order to make
XFree86 work in its current state.
2000-02-26 18:53:10 +00:00
de974ff82d
Add an internal bus space method alpha_bus_space_translate(), which
...
provides a method to translate an address on an I/O bus into a sysBus
address, along with acccess method information.
2000-02-25 00:45:04 +00:00
17c346b9e1
Changed cacheable -> prefetchable. [sync w/ swiz]
2000-02-06 04:07:18 +00:00
90bc415584
Pull in the BWX inlines. We expect the arch to be set appropriately for
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the assembler before these files are pulled in by the chip-sepecific files.
1999-12-02 19:44:49 +00:00
3110e22945
use current bus_space interface names for barrier ops
1998-08-30 23:29:10 +00:00
f948e430bb
Provide a hook for bypassing space accounting, needed to support ISA PnP
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for now.
1998-07-31 04:37:02 +00:00
14df007174
Oops, don't forget to fill in *addrp.
1998-06-07 00:29:29 +00:00
7a6d646c9b
Implement bus_space_{alloc,free}() for BWX bus space.
1998-06-06 22:28:16 +00:00
d4d49905dd
Add support for using BWX for PCI config space and PCI i/o and mem space
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on the ALCOR2 and Pyxis. BWX is enabled iff:
- It hasn't been disabled by the user (patch `cia_use_bwx' or build cia.o
with the option "CIA_USE_BWX=0"),
- it's enabled in CIA_CSR_CNFG,
- we are running on an EV5-family processor,
- BWX is in the processor's capabilities mask.
1998-06-04 21:34:45 +00:00
thorpej