Commit Graph

11 Commits

Author SHA1 Message Date
gdamore
c119401402 Update algor clock handling. This includes using the common mc146818
support code, using the common MIPS 3 cp0 based interrupt code, adding
time counters, and using the generic TODR code.

Unfortunately, due to lack of hardware, I don't know for sure that any
of this works, though the same code in evbmips works.  Commiting anyway,
ok'd by simon@.
2006-09-05 01:33:24 +00:00
christos
95e1ffb156 merge ktrace-lwp. 2005-12-11 12:16:03 +00:00
drochner
2db688402b adapt to ISA "unknown address" namespace separation (purely mechanical,
as far as "grep" reaches)
2004-09-14 20:32:48 +00:00
lukem
6fdfc66c57 add __KERNEL_RCSID() 2003-07-14 22:57:46 +00:00
fvdl
6bd0c9f44d Move definition of ISA_DMA_BOUNCE_THRESHOLD to dev/isa/isareg.h. 2003-05-05 12:55:41 +00:00
thorpej
47c14a34bc Fix script-o's in last. 2002-10-02 03:36:20 +00:00
thorpej
5a9ddc1422 Use CFATTACH_DECL(). 2002-10-02 02:21:20 +00:00
thorpej
9a711d6985 Declare all cfattach structures const. 2002-09-27 20:29:02 +00:00
thorpej
3835413bc1 Overhaul of the ISA autoconfiguration code to support direct
configuration of devices logically attached to the ISA bus:

* Change the isa_attach_args to have arrays of io, mem, irq, drq
  resources.
* Add a "pnpnames" and a linked list of "pnpcompatnames" to the
  isa_attach_args.  If either of these members are non-NULL,
  direct configuration of the bus is being performed.  Add an
  ISA_DIRECT_CONFIG() macro to test for this.
* Drivers are not allowed to modify the isa_attach_args unless
  direct configuration is not being performed and the probe fucntion
  is returning success.
* Adapt device drivers -- currently, all driver probe routines return
  "no match" if ISA_DIRECT_CONFIG() evaluates to true.
2002-01-07 21:46:56 +00:00
thorpej
af66038f73 Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
2001-11-14 18:15:10 +00:00
thorpej
16b9c60621 A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU).  There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.
2001-05-28 16:22:13 +00:00