- finish implementing splraiseipl (and makeiplcookie).
http://mail-index.NetBSD.org/tech-kern/2006/07/01/0000.html
- complete workqueue(9) and fix its ipl problem, which is reported
to cause audio skipping.
- fix netbt (at least compilation problems) for some ports.
- fix PR/33218.
The main changes needed are:
1) pass address and IRQ information from aubus (auspi uses interrupts)
2) all Au1550 PSC protocols have the same status and register bits
for enable, so clean that up (clock registers could be different)
3) improve timeout logic on enable (a fixed delay isn't good enough)
4) make aupsc_print return QUIET, as it is annoying to see messages
for unconfigured protocols. This whole mechanism should be re-
engineered, to either use indirect configuration or provide more
detailed board-driven configuration. A comment to that effect is
placed in the source.
This is shown to work on DBAU1550.
assigned to request 0. With this change, ethernet interrupts are assigned
to req1, seperately from req0. This potentially gives better performance
by shortening the list of handlers walked somewhat.
echos this "non-error" message (not even tulip.c). Included is an
explanatory message stating that these counters should probably all be
converted to evcnt counters.
This allows us to convert aucom to just another com attachment, and cleanup
some code in the com_arbus.c.
Additionally, we use a common com_cleanup routine rather than having a
zillion copies of it in the attachment points.
This has been tested on a number architectures, and it has been shown to get
close to comparable performance when COM_REGMAP is defined, and comparable
when it is not defined.
Approved by core@. Fixes PR port-evbmips/32362.
Additionally, do not fail if no RTC is present, as not all boards have one.
Malta now uses the common dev/ic/mc146818.c code as much as possible, reducing
local "custom" code. These malta changes are *untested*, as I do not have
a Malta board to test with. If someone would please test them and get back to
me, I'd appreciate it!
the TOY register, which is presumed to be seconds since Jan. 1 2000.
For now I'm assuming the trim divider is 32K, which makes 1 tick per sec.
This is true for the DBAU1550 board at least. Other boards might need to
initialize a reasonable trim counter and establish the 32KHz oscillator.
In any case, this code is *no worse* on older systems than what was there
before.
(coming in a the follow up commit for dbau1550 only), and is not yet complete.
It has serious problems, enough that it isn't yet usable, although the
functionality is all basically fleshed out. It is not enabled in any
default kernels at this point, so it should be benign. Hopefully the
bugs will soon be worked out and these caveats can be removed.
