9 Commits

Author	SHA1	Message	Date
gmcgarry	cc4037a913	Overhaul the emulation facility. We do this by: ... - accumulating all emulation code (including floating-point) in one place - steal MachFPInterrupt() back from SOFTFLOAT for use only with interrupts and traps from *real* FPUs - introducing MachEmulateInst() as a common dispatch point for all emulated instructions - cleaning up emulation dispatch in trap() Also, while we're here, implement MIPS2 LL/SC/SYNC emulation for MIPS1. Tested on r3k with and without SOFTFLOAT enabled.	2002-07-06 23:59:18 +00:00
soda	7e7514b7f1	OP_BLTZAL was defined twice.	2001-08-13 18:48:48 +00:00
jeffs	6b28794054	Add support for 3 QED special2 opcodes.	2000-07-11 06:27:58 +00:00
jonathan	22b3f9ebd8	Add bi-endian support to mips locore, <mips/endian.h>, and mips_opcode.h. ... Derived from a change request (PR port-mips/4277) from Tsubai Masanari, (tsubai@iri.co.jp).	1997-10-17 04:43:57 +00:00
jonathan	78aac1c7b9	Merge in additions of missing MIPS-I opcodes, and r4000-in-32-bit mode ... opcodes from the Pica port. Per Fogelstrom claims the latter are all supposedly MIPS-II (r6000) instructions, rather than MIPS-III (R4000), but we haven't checked to be sure. Are LL/SC really in MIPS-II? CVS:: ----------------------------------------------------------------------	1996-03-23 18:49:29 +00:00
cgd	a63beafc2b	new RCS ID format.	1994-10-26 21:08:38 +00:00
glass	6b63c739f3	bsd 4.4-lite pmax port as ported to NetBSD	1994-05-27 08:57:32 +00:00
glass	377b097932	upgrade to bsd 4.4-lite code base. only mod is rcsids	1994-05-27 08:39:00 +00:00
deraadt	fe806afec2	pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>	1993-10-12 03:22:19 +00:00