wrstuden
eb21ed4746
Adapt to going back to decemal device numbering.
2000-06-09 18:00:45 +00:00
wrstuden
8d04cd3f90
Rather than assinging 64 tty's per pci card, assign tty's as found.
...
Cyclades says driver should work with up to 128 tty's per pci card
even though they only support 64 now. Also matches FreeBSD behavior.
Print located tty's using new tty naming scheme - ttyCZ?? where ?? are
two hex letters.
Make firmware load on macppc - one le32toh() was missing.
2000-06-09 16:53:23 +00:00
soda
8ac7bdd00c
changes for NEC RISCstation 2250 of arc port.
2000-06-09 04:48:12 +00:00
soda
77625cf7ec
long long constant needs "LL" suffix.
2000-06-09 04:45:53 +00:00
augustss
b8f4f2be87
Regen.
2000-06-09 00:21:08 +00:00
augustss
def28a5cd2
Add some PCI devices found in the IOpener (commited from the IOpener itself :).
2000-06-09 00:20:18 +00:00
gmcgarry
6dd21e55a9
Make attach messages consistent with PCI drivers. Make function pointer
...
usage consistent with other drivers.
2000-06-08 22:15:52 +00:00
haya
b6a821f042
Change IPL when bridge's interrupt handler calls child device's
...
interrupt handler (This solution is not very good).
2000-06-08 10:28:28 +00:00
scw
295ed77595
The OPTi controller supports a 32-bit dataport after all.
...
Also detect when the chip is sitting on a 25MHz PCIbus and
set the timing registers accordingly.
2000-06-07 20:42:52 +00:00
ad
887d4555cd
Regen.
2000-06-07 19:53:17 +00:00
ad
4837200a8c
Add vendor/device ID for 3ware Escalade IDE RAID controller.
2000-06-07 19:52:07 +00:00
mrg
a67130a218
regen.
2000-06-07 09:55:22 +00:00
mrg
09b843b7f6
fix a couple of the sun entries.
2000-06-07 09:52:16 +00:00
haya
dca97557cd
Add CB_BCR_RESET_ENABLE in bridge control resister's bit definition.
2000-06-07 09:02:46 +00:00
thorpej
b15bbb90f9
Add missing break;
2000-06-07 04:31:49 +00:00
soren
13ed0863f8
Regen.
2000-06-07 01:58:17 +00:00
soren
e2c1012576
Add Trident 9397DVD.
2000-06-07 01:57:30 +00:00
thorpej
c85d6d7ca3
Improve the Cypress name a little.
2000-06-06 22:56:06 +00:00
thorpej
a452638f06
In pciide_mapreg_dma(), check to see what type the BAR is before
...
mapping the registers, as suggested by a comment in that function.
2000-06-06 22:47:22 +00:00
soren
ba5df2479b
Shorten names of VIA controllers to fit in 80 columns with versions.
2000-06-06 17:48:12 +00:00
thorpej
c40fa3c4d4
Actually program the DMA mode of the drives into the Cypress
...
controller. Fixes a long-standing problem where IDE DMA wasn't
working on the AlphaPC 164SX.
2000-06-06 17:34:22 +00:00
kleink
05d7f969b9
Regen.
2000-06-06 07:55:50 +00:00
kleink
aed5858e8b
Add the product ID for the ESS Maestro 3 modem function as well.
2000-06-06 07:55:17 +00:00
thorpej
21d9669e4f
Common routines for read/writing Cypress 82c693 control registers. Needed
...
by `pciide' and the Alpha `sio' (PCI-ISA bridge) driver.
2000-06-06 03:07:39 +00:00
tsutsui
8c4d1bf1f9
Adapt MI ncr53c9x changes.
2000-06-05 15:08:00 +00:00
kleink
ca3d9c7fa7
Regen.
2000-06-05 11:34:07 +00:00
kleink
428a7ca4e3
Add the ESS Maestro 3 product ID as well.
2000-06-05 11:33:35 +00:00
kleink
9b40e3731a
Regen.
2000-06-05 11:31:15 +00:00
kleink
be40495bb0
ESSTECH:
...
* add what's allegedly the Maestro 1's product ID.
* align product names with data sheets.
2000-06-05 11:29:28 +00:00
gmcgarry
745e3fef63
pciiide -> pciide
2000-06-04 22:22:12 +00:00
tsutsui
f44619d89d
KNF some lines.
2000-06-02 18:34:05 +00:00
augustss
87a5ae384c
Update URLs.
2000-06-01 09:58:19 +00:00
augustss
f1b4af5ba1
Make this compile too.
2000-05-30 08:36:27 +00:00
matt
e78793c612
Beginning of a IEEE 1394 framework. An attachment for PCI OHCI controllers
...
and bus-independent module that just begins to print things out. No real
code behind it. THIS IS A WORK IN PROGRESS. The *reg.h are woefully
incomplete.
2000-05-30 06:56:13 +00:00
matt
c7326acd04
Add the PCI attachment for IEEE 1394 OHCI controllers. Files to follow later.
2000-05-30 00:53:14 +00:00
matt
fd1991294f
Regen
2000-05-30 00:21:07 +00:00
matt
adaaa34784
Add the TI 1394 controllers. Makes all the 1394 controller descriptions
...
similar.
2000-05-30 00:20:41 +00:00
tsubai
8cde93a435
* Support (not so) new cards. (only Cyclom-8YsP+ is tested)
...
* Make compilable with CY_DEBUG.
2000-05-29 12:05:41 +00:00
drochner
c461529353
regen
2000-05-28 10:25:25 +00:00
drochner
f8091908b5
-correct description for 3c905b-FX (100 Mb only)
...
-add Neomagic 256ZX
2000-05-28 10:24:57 +00:00
thorpej
3a4393ff92
While DM9102A boards tend to have ISV-format SROMs (likely to describe
...
the HomePNA PHY typically connected to the external MII interface),
DM9102 implementations (often found on motherboards) do not. Handle
this.
2000-05-27 19:42:06 +00:00
scw
46807640c7
Add support for the OPTi 82c621 PCIIDE controller and its derivatives.
...
I only have a Compaq laptop on which to test this, so reports of
success/failure in other systems would be welcomed.
2000-05-27 17:18:41 +00:00
scw
1d2a3e79a9
Regen.
2000-05-27 17:12:36 +00:00
scw
713621eb0e
Add entries for a couple of OPTi PCI-IDE controllers.
2000-05-27 17:11:37 +00:00
nathanw
00369993f9
Whitespace police.
2000-05-27 16:38:02 +00:00
soren
ed0572ca92
Regen.
2000-05-27 11:40:04 +00:00
soren
eaef48d317
Add a few devices.
2000-05-27 11:38:31 +00:00
thorpej
8a3725612d
Add support for the Davicom DM9102 and DM9102A 10/100 Ethernet chips.
...
Partially based on diffs submitted by Matthew Orgass <darkstar@pgh.net>
and IWAMOTO Toshihiro <iwamoto@sat.t.u-tokyo.ac.jp>.
2000-05-26 16:38:13 +00:00
dante
3d7bdc4c94
Fix a bug introduced in last commit which caused a painc due to
...
re-enqueueing an already free ccb.
Prepare the background to have a unique initialization function for
all of the supported host adapters.
Rename a lot of #define in a more sane way.
Move Carriers initialization and defines in adwmcode.{c,h}
Don't lose Carrier nodes in case of a BUS/Chip reset explicitly invoked
after a DMA failure.
XXX - DMA failure still arise when AdvanSys U[2]W host adapters are used
in conjunction with Intel 82443BX Host Bridge/Controller (rev. 0x03).
!?!Have to understand why!?!
2000-05-26 15:13:43 +00:00
matt
bf05730540
Regen.
2000-05-26 05:07:02 +00:00