Commit Graph

11 Commits

Author SHA1 Message Date
lukem 95c969f245 add RCSID 2001-11-15 07:03:28 +00:00
kanaoka 3b4f143fd8 - Correct a value of subend.
Pointed out by enami tsugutomo <enami@but-b.or.jp>.
2001-08-27 13:02:12 +00:00
mcr 6244484599 added context parameter to pciaddr_resource_{reserve,allocate}
and to pci_device_foreach().
	added new function pci_device_foreach_min().
2001-07-06 18:02:35 +00:00
kanaoka bb0eabfe15 - fixup only #0 bus --> fixup maxbus.
- Don't pciaddr_do_resource_allocate if device is AGP
   to avoid conflict.
2001-04-23 19:15:29 +00:00
nathanw b3e0af3d32 Fix a problem uncovered by rev 1.5 of pcibios.c:
Avoid interpreting the upper 32 bits of 64-bit BARs as a 32-bit BAR.
Otherwise, the code would assume that the value 0 was incorrect and either:
(a) [on bus 0] "fix up" the address to some nonzero value, thus placing
    the decoded address range outside of 32-bit address space, or
(b) [elsewhere] completely disable the device.

The fact that this behaviour depends on the bus number of the device is
already XXX'd.

XXX: This will need revisiting if and when we ever want to handle a PCI bus
XXX: with more than 32 bits of address space on an i386.

The onboard Adaptec 7890 on my Dell Precision Workstation 410 works again.
2000-08-03 20:10:45 +00:00
soda 0cbe0d600f fix oversight introduced in previous my commmitment (revision 1.4),
pointed out by Michael Shalayeff <mickey@openbsd.org>.
2000-08-02 02:54:41 +00:00
uch ae581ace81 reserve AGP space to avoid resource conflict. 2000-08-01 05:23:59 +00:00
soda b01ab37ef6 use PCIBIOS_PRINTV() defined in pcibios.h, instead of homegrown DPRINTF(). 2000-07-18 11:18:04 +00:00
uch a99c8407ab don't destroy PCI bus space extent for rbus_machdep.c 2000-05-31 16:38:55 +00:00
uch b444da72bd Skip fixup phase when system BIOS setting were perfect.
don't write 0 to command register. (it is harmful).
2000-05-17 09:50:34 +00:00
uch cc30f00dd3 PCI I/O address fixup routine.
When BIOS don't asign PCI I/O address space to device,
        allocate it without conflict and write to PCI configuration header.
2000-04-28 17:19:10 +00:00