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b96bc0d7bc
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33136 Commits

Author SHA1 Message Date
thorpej
b96bc0d7bc Use CFATTACH_DECL(). 2002-10-02 04:06:36 +00:00
thorpej
47c14a34bc Fix script-o's in last. 2002-10-02 03:36:20 +00:00
thorpej
7c0e5bcc4b Fix script-o's in previous. 2002-10-02 03:31:58 +00:00
thorpej
4cac257e08 More script-o fixes. 2002-10-02 03:25:46 +00:00
thorpej
9b3343e917 Fix script-o in last. 2002-10-02 03:18:07 +00:00
thorpej
5a9ddc1422 Use CFATTACH_DECL(). 2002-10-02 02:21:20 +00:00
thorpej
0dac35b547 Use CFATTACH_DECL(). 2002-10-02 02:00:07 +00:00
thorpej
354bc052d9 Use the register prefix in the ELF case in _PROF_PROLOGUE. 2002-10-02 00:23:29 +00:00
bjh21
92c36acca6 Report the hardware version in case anyone's interested (I was). 2002-10-01 22:52:22 +00:00
bjh21
cef90c2dc7 Constify ide_versions. 2002-10-01 22:38:56 +00:00
bjh21
b828507087 constify various string tables. 2002-10-01 22:33:10 +00:00
bjh21
7e08b73e47 Use CFATTACH_DECL(). 2002-10-01 22:23:52 +00:00
bjh21
8b39ec99a9 Add a shutdown hook which puts the Hydra back into its post-reset state, 
largely to ensure that we don't leave the slave CPUs running when we go
back to RISC OS.
 2002-10-01 22:18:00 +00:00
bjh21
b585e1d57a Remove a spurious ']' from the CFATTACH_DECL invokation. 2002-10-01 22:11:14 +00:00
thorpej
a942508291 Use CFATTACH_DECL(). 2002-10-01 21:36:00 +00:00
thorpej
217c799fe7 Use CFATTACH_DECL(). 2002-10-01 21:24:43 +00:00
reinoud
4d64d47a1f Remove old unused cruft 2002-10-01 21:16:15 +00:00
scw
c4efa0ddba Change IPL_SOFTNET to 3. 2002-10-01 21:07:31 +00:00
scw
0e3aa70138 Count all soft interrupt events per level, rather than just 
the first one per call to softintr_dispatch().
 2002-10-01 21:04:59 +00:00
scw
92c80efadc Fix a soft interrupt botch which prevented softints being dispatched 
on exit from regular h/w interrupts.
 2002-10-01 20:41:52 +00:00
provos
d94186ee91 more trailing \r cleanup; pointed out by wiz 2002-10-01 20:41:22 +00:00
fvdl
6b7332c86b The local APIC registers are defined for 32bit access only, so don't 
use movzbl on them.
 2002-10-01 19:36:51 +00:00
fvdl
bb7657559b Don't use pool(9) for TLB shootdown queue elements. Recent pool 
changes made the usage here clash with the pool code, and the
pool code is overkill for this case (fixed number of elements,
always NOWAIT).

Use a simple static freelist allocator instead (pv_list-like).
 2002-10-01 19:36:06 +00:00
thorpej
3b6eef8108 Use CFATTACH_DECL(). 2002-10-01 19:24:47 +00:00
thorpej
ad2758f375 Use CFATTACH_DECL(). 2002-10-01 19:18:57 +00:00
matt
be5fafec51 ANSI'fy the inline functions. 2002-10-01 19:08:51 +00:00
thorpej
c1077f220d Use CFATTACH_DECL(). 2002-10-01 18:57:48 +00:00
thorpej
34c3944c08 Use CFATTACH_DECL(). 2002-10-01 18:40:06 +00:00
scw
2ce95435ad One of the last pieces of the SH5 pmap jigsaw; detect and deal with 
operand cache synonyms and paradoxes for shared mappings:

 - Writable mappings are cache-inhibited if the underlying physical
   page is mapped at two or more *different* VAs.

   This means that read-only mappings at different VAs are still
   cacheable. While this could lead to operand cache synonyms, it
   won't cause data loss. At worst, we'd have the same read-only
   data in several cache-lines.

 - If a new cache-inhibited mapping is added for a page which has
   existing cacheable mappings, all the existing mappings must be
   made cache-inhibited.

 - Conversely, if a new cacheable mapping is added for a page which
   has existing cache-inhibited mappings, the new mapping must also
   be made cache-ibhibited.

 - When a mapping is removed, see if we can upgrade any of the
   underlying physical page's remaining mappings to cacheable.

TODO: Deal with operand cache aliases (if necessary).
 2002-10-01 15:01:48 +00:00
fvdl
1aca7be70a Add cpu0 at mainbus0 2002-10-01 13:29:03 +00:00
fvdl
26ab868e68 Merge Bill Sommerfeld's i386 MP branch. This code has some known 
caveats, but works quite well in a lot of MP cases, and all
UP cases that I have tested. Parts of this will hopefully be
reworked in the not-too-distant future.
 2002-10-01 12:56:36 +00:00
aymeric
f835a6ae04 . treat a stream of framing errors as a single break 
. trigger ddb upon receiving a break if we are the console
 2002-10-01 12:17:09 +00:00
reinoud
7ba11c51fd Fix some small range checks and why weren't we writing the palette in when 
we're asked to set the VIDC in a given state! :-D ahum... these are fixed
now. The top palette entry wasn't set.
 2002-10-01 12:09:49 +00:00
bsh
10bb2aff03 add board type for Intel PXA2[15]0 and Samsung S3C2800 based boards. 2002-10-01 11:02:27 +00:00
abs
ef14d0e624 Enable PPP_* options for ppp 2002-10-01 09:52:10 +00:00
abs
cd05e3d894 Enable ppp 2002-10-01 09:37:11 +00:00
scw
9d94c9899c Check if an interrupt is already claimed _after_ locating the 
right interrupt handle.
 2002-10-01 07:58:54 +00:00
scw
1e4acb4d20 Another temporary fix until I write a bootloader: run the kernel 
through dbsym(8).
 2002-10-01 07:56:45 +00:00
scw
5a512e6285 Flesh out bus_dmamap_sync(). 2002-10-01 07:55:17 +00:00
scw
02301c13c5 Add a #define for the SH5's cacheline size. 2002-10-01 07:50:36 +00:00
scw
a5ea619bef In pmap_extract() deal with KVAs in KSEG0 (which can be passed by the 
bus_dma(9) code) instead of panicing.
 2002-10-01 07:49:46 +00:00
thorpej
82af7d52d4 Use CFATTACH_DECL(). 2002-10-01 05:32:42 +00:00
thorpej
fa165ee3fd Use CFATTACH_DECL(). 2002-10-01 05:18:59 +00:00
thorpej
b7e3052e30 Use CFATTACH_DECL(). 2002-10-01 05:01:37 +00:00
thorpej
6bc733245c Missed one use of CFATTACH_DECL(). 2002-10-01 04:59:10 +00:00
thorpej
a84e1f7f8f Use CFATTACH_DECL(). 2002-10-01 04:43:01 +00:00
thorpej
f59e5352f2 Use CFATTACH_DECL(). 2002-10-01 04:21:32 +00:00
thorpej
d1c37db940 Use CFATTACH_DECL(). 2002-10-01 03:10:12 +00:00
thorpej
c4cbfcf060 Use CFATTACH_DECL(). 2002-10-01 02:54:11 +00:00
thorpej
d652bdcafe Use CFATTACH_DECL(). 2002-10-01 02:49:56 +00:00