hpeyerl
b5cbb20a0f
Add wscons to files.pb1000 in case someone wants to plug a kbd/mouse
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into the USB. Add config file for DB1500. We should really make a
files.db1500 but whatever.
2003-04-01 17:40:19 +00:00
hpeyerl
badb1c52ec
OHCI front-end driver for Alchemy cpu's. We now have USB Host support.
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Tested on PB1500 and DB1500 boards.
2003-04-01 17:36:45 +00:00
hpeyerl
2664e8455c
route a clock to the USB Host peripheral. includes code to configure
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auxpll but this seems to come up at the right speed out of reset so it's
#if 0'd out.
2003-04-01 17:35:45 +00:00
hpeyerl
4a1358aecb
add defines for high/low level triggered interrupts (need this in au_icu.c)
2003-04-01 17:34:10 +00:00
hpeyerl
deece0b31e
s/ohci.c/ohci_aubus.c/
2003-04-01 17:31:50 +00:00
hpeyerl
29422429f6
add defines for Alchemy clock and frequency control registers.
2003-04-01 17:30:09 +00:00
hpeyerl
56f13f6fa9
allocate an aubus dma tag.
2003-04-01 17:29:11 +00:00
hpeyerl
9cda767630
support active low, level triggered interrupts, needed for ohci front end.
2003-04-01 17:28:24 +00:00
he
31f4d984cb
The adler32.c file previously from libz is no longer needed.
2003-04-01 16:50:52 +00:00
thorpej
747aa1e024
Use PAGE_SIZE rather than NBPG.
2003-04-01 16:34:58 +00:00
thorpej
d3f30fc625
We use 8K VM pages on Sun4U, so make PAGE_SIZE, PAGE_SHIFT, and PAGE_MASK
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into compile-time constants.
2003-04-01 16:05:30 +00:00
thorpej
43e759e5ac
Use PAGE_SIZE rather than NBPG.
2003-04-01 15:47:48 +00:00
thorpej
50659edcb7
Make PAGE_SIZE, PAGE_SHIFT, and PAGE_MASK a compile-time constant on Sun2.
2003-04-01 15:33:48 +00:00
thorpej
3b9d583516
Use PAGE_SIZE rather than NBPG.
2003-04-01 15:23:07 +00:00
thorpej
1411d9951f
Use PAGE_SIZE rather than NBPG.
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XXX Except in one place, which will require more work.
2003-04-01 15:22:53 +00:00
thorpej
e9f0a43d28
Use PAGE_SIZE rather than NBPG.
2003-04-01 15:14:20 +00:00
thorpej
d071d9a8d0
Use PAGE_SIZE rather than NBPG.
2003-04-01 15:02:05 +00:00
he
bca180fc42
Remove what appears to be a spurious brace.
2003-04-01 14:32:09 +00:00
he
da63355bc0
Undo the last; adding the quad arithmetic caused the boot code to
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overflow. Instead do as the mvme68k port, and use 32-bit daddr_t here.
2003-04-01 14:27:43 +00:00
he
369a9dc367
Adapt to daddr_t being bumped to 64 bits. This required us to add
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div/mod quad operations to libsa, and adjusting a pair of format specifiers.
2003-04-01 13:31:23 +00:00
scw
e7e825f881
Remove some obsolete checks for __GNUC__ < 3.
2003-04-01 10:27:17 +00:00
scw
99e0368bfe
Add PMAP_CACHE_VIVT, since the I$ is virtually indexed/tagged.
2003-04-01 10:25:09 +00:00
scw
a7bc0a349e
Some tweaks to reduce the effect of rounding errors in tmu_microtime()
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and the calculation of the delay() constant.
2003-04-01 10:23:30 +00:00
igy
e7735eb5b9
add comment for VR4181
2003-04-01 02:45:34 +00:00
igy
775eee3514
correcting register definition for VR4181
2003-04-01 02:33:51 +00:00
thorpej
3faec1e02a
Use PAGE_SIZE rather than NBPG.
2003-04-01 02:17:17 +00:00
thorpej
f8d3a59131
Use PAGE_SIZE rather than NBPG.
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XXX Except for one place, which will require more work.
2003-04-01 02:15:45 +00:00
thorpej
89a25a097c
Use PAGE_SIZE rather than NBPG.
2003-04-01 02:13:53 +00:00
thorpej
52d8769e0b
Use PAGE_SIZE rather than NBPG.
2003-04-01 02:01:43 +00:00
thorpej
e48b2dc368
Make PAGE_SIZE a constant on acorn26.
2003-03-31 21:30:56 +00:00
thorpej
a8b54dc6f5
Use <arm/proc.h>.
2003-03-31 19:53:25 +00:00
chris
d19c70cbe2
Fix for PR arm/17971. Used patch as provided
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Compiled, but no hardware to test on.
2003-03-31 19:52:35 +00:00
rafal
0adc6315a0
Oops, make sure to re-enable the IP32 watchdog correctly, else we end up
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getting random reboots after returning from DDB.
2003-03-31 00:56:53 +00:00
tsutsui
71446bc717
Use 32bit daddr_t.
2003-03-30 08:52:23 +00:00
tsutsui
361715b6e1
Sync with news68k/disksubr.c rev 1.11-1.13:
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- Fix -Wsign-compare warnings.
- Drop trailing white space.
- Since current sdstrategy() calls bounds_check_with_label() implicitly,
allow overwriting disklabel for RAW_PART in bounds_check_with_label().
- Also allow overwriting disklabel even for !RAW_PART if securelevel == 0
so that installboot(8) can write bootblock against 'a' partition.
- labelsector is at top of RAW_PART, not 'a' partition.
2003-03-30 08:42:00 +00:00
tsutsui
3917373a21
- Since current sdstrategy() calls bounds_check_with_label() implicitly,
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allow overwriting disklabel for RAW_PART in bounds_check_with_label().
- Also allow overwriting disklabel even for !RAW_PART if securelevel == 0
so that installboot(8) can write bootblock against 'a' partition.
- labelsector is at top of RAW_PART, not 'a' partition.
2003-03-30 08:37:16 +00:00
tsutsui
b1b52ec626
Use 32bit daddr_t.
2003-03-30 08:01:13 +00:00
isaki
5f88fc57fa
Make it compilable.
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see http://mail-index.netbsd.org/source-changes/2003/03/26/0009.html
2003-03-30 07:58:03 +00:00
kristerw
820df2464a
Remove unneeded cast that prevents PC_REGS from being used as lvalue.
2003-03-30 02:03:12 +00:00
kristerw
c3b2957983
#include "opt_kgdb.h"
2003-03-30 01:20:13 +00:00
thorpej
7f9b4b1a1c
Add some braces to make a block of code a bit easier to read.
2003-03-30 00:28:19 +00:00
kristerw
6a6ff92fd5
Revert last change (dependance on divdi3.c, moddi3.c, and qdivrem.c) and
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use 32bit daddr_t instead, as suggested by Izumi Tsutsui.
2003-03-30 00:17:28 +00:00
thorpej
7a3fa51b7f
Garbage-collect the DYNAMIC_CRC_TABLE stuff. The table it computed
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was incompatible with the new CRC code, and it is largely unnecessary
now, since the static table is so much smaller.
Fixes PR kern/20935.
2003-03-29 22:25:25 +00:00
scw
ec17fb4b99
Fix bus_space_read_region_N() to work as advertised.
2003-03-29 22:07:14 +00:00
matt
6a15c68f5d
Make sure to turn on the speed knobs in HID0 on the 745x.
2003-03-29 18:18:54 +00:00
matt
2c37db6aec
Allow oea_batinit to be called with either the MMU on or off.
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(don't reset the BATs if the MMU is off).
2003-03-29 18:09:59 +00:00
matt
b3715c2f6a
Add 7450 LRSTK and FOLD bits.
2003-03-29 18:08:42 +00:00
bsh
347085b57d
put options XSCALE_CACHE_WRITE_THROUGH into opt_cpuoptions.h.
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add XSCALE_CACHE_WRITE_BACK.
2003-03-29 07:59:41 +00:00
bsh
105db01dcd
for Intel PXA2[15][05] processors, select write-back/write-through
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cache based on CPU id. write-through on PXA2[15]0 B2 stepping and
earlier. write-back on C0 and C1 stepping (a.k.a PXA2[15]5 A0)
options XSCALE_CACHE_WRITE_{THROUGH,BACK} can override it.
for other XScale CPUs than PXA2xx, XSCALE_CACHE_WRITE_THROUGH works
same as before.
2003-03-29 07:58:16 +00:00
he
8cd91d8236
Commit a workaround for PR toolchain/20924, so that this compiles again.
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When/if the PR is fixed, this change should probably be reverted.
2003-03-28 20:25:40 +00:00