config_pending_incr()/config_pending_decr() so that disks are probed
before trying to mount root, if the card is plugged in at boot time.
Should fix kern/33137 by KIYOHARA Takashi.
- initialize it properly in the bus front-ends (all 2, exept in wdc_pcmcia.c
for the "Sandisk CompactFlash Card" where it's set to 1)
- remplace hardcoded '2' by ata_channel->ch_ndrive in MI IDE drivers.
From Christos Zoulas in kern/32501.
XXX: Linux driver has a hack not to probe the slave drive. We just
create a phantom drive:
wdc0 at pcmcia0 function 0: < , Memory Card Adapter II, V1.00>
wdc0: i/o mapped mode
atabus2 at wdc0 channel 0
wd1 at atabus2 drive 0: <Memory Card Adapter II>
wd1: drive supports 1-sector PIO transfers, LBA addressing
wd1: 241 MB, 965 cyl, 16 head, 32 sec, 512 bytes/sect x 494080 sectors
wd2 at atabus2 drive 1: <>
wd2: drive supports 1-sector PIO transfers, chs addressing
wd2: 0, 0 cyl, 0 head, 0 sec, 512 bytes/sect x 0 sectors
wd2: 32-bit data port
wd2: disk label read failed
wd2: disk label read failed
controller to be ready, but the drive attached to it may not be ready yet.
Add a half a second delay before calling wdcattach(), to let the drive
have its electronic ready to properly respond to the register tests done
in wdcprobe1(). Delay based on experiments done by John Refling with
various devices as part of the audit-trail of kern/25659; complete
the fix for kern/25659.
ata_channel.
- Add and use a CHAN_TO_WDC_REGS() macro to get the wdc_regs from an
ata_channel.
- Add and use a CHAN_TO_PCIIDE() macro to get the pciide_softc from an
ata_channel.
- Add and use a CHAN_TO_PCHAN() macro to get the pciide_channel from an
ata_channel. (This one just hides a cast, and is really just for
consistency with the others.)
wdc_regs structure, and array of which (indexed per channel) is pointed
to by struct wdc_softc.
- Move the resulting wdc_channel structure to atavar.h and rename it to
ata_channel. Rename the corresponding flags.
- Add a "ch_ndrive" member to struct ata_channel, which indicates the
maximum number of drives that can be present on the channel. For now,
this is always 2. Add an ATA_MAXDRIVES constant that places an upper
limit on this value, also currently 2.
The memory window is not actually activate in I/O card configurations. It was
transparently falling back to 16-bit I/O mode.
Implement "memory card" mode correctly, with polling.
any interrupts, and therefore wedge on any access. However, there is another
memory mode that gives us a memory-mapped data register, which we can use.
Also set the new "DATA1K" flag to tell the wdc backend that we have a large
data area to read from -- this can be used with the region methods.
count there is (for SCSI, adapt_refcnt) to 1 and call the appropriate
"delref" function afterwards to disable the controller. This is a bit
simpler.
In a couple of cases, just remove the state machine, because it wasn't
really necessary.
* Remove the "expected function" value. This was just causing problems with
multifunction cards. Differentiating the functions is better done by
checking the function type (which we now do in ep and sm).
* Add support for matching CIS strings. This necessitated changing the calling
pattern a little too.
Use this enhanced version rather than driver-specific versions that do the
same thing.
Also, remove the last vestiges of PCMCIA_STR_*.
case (ne@pcmcia) where we were using these to create a subregion, it is better
handled by calling bus_space_subregion().
Now there is a 1:1 mapping between I/O spaces in the config table and windows
mapped in the function. Rework the multifunction mapping code to take
advantage of this by using both I/O base addresses if necessary.
registers are registers that overlap with others on many controllers, but
which may actually be distinct on some controllers. Right now, the two
shadows are:
- wd_status (usually overlaps wd_command)
- wd_features (usually overlaps wd_error)
Add a new helper function, wdc_init_shadow_regs(), used to initialize
the shadow register handles on controllers where they do actually overlap.
Partially from Jordan Rhody @ Wasabi Systems, Inc.
- wdc_xfer to ata_xfer
- channel_queue to ata_queue
and move them to <dev/ata/atavar.h> so they can be used by non-wdc ATA
controllers. Clean up the member names of these structures while at it.
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
make it more correct) by removing a flag to track wdc attachment. Disable
the function after wdcattach() is called, and remove a conditional when
enabling the function in wdc_pcmcia_enable().
http://mail-index.netbsd.org/tech-kern/2003/09/25/0006.html
This adds a device (atabus) between IDE controllers and wd or atapibus, to
have each ATA channel show up in the device tree. Later there will be atabus
devices in /dev, so that we can do IOCTL on them.
Each atabus has its own kernel thread, to handle operations that needs polling,
e.g. reset and others.
Device probing on each bus it defered to the atabus thread creation.
This allows to do the reset and basic device probes in parallel, which reduce
boot time on systems with several pciide controllers.
1) Don't wait for DRQ on an IDENTIFY command -- if it's not set when we see
BSY clear, abort the command and ignore the drive. (Do this by testing
for DRQ in the read/write cases in __wdccommand_intr().)
2) Don't wait for DRQ to deassert when we finish an IDENTIFY (or any other
non-block command that reads data) -- we don't do this for block I/O, and
empirically it doesn't clear on my CF cards at all, causing a pointless 1s
delay.
3) Add comments to some of the delay()s, and add missing ones in wdcreset()
and the WDCC_RECAL in the so-called "pre-ATA" probe.
4) Slightly simplify the reset sequence -- we were doing an extra I/O.
5) Modify the register writability test to make sure that registers are not
overlapped -- this can happen in some weird cases with a missing device 1.
6) Check the error register value after the reset -- if it's not 01h or 81h,
as appropriate (see ATA spec), punt.
Tested with a number of ATA-only, ATAPI-only, mixed ATA-ATAPI, CF, and IDE
disk configurations.
Also remove the SINGLE_DRIVE nonsense again.
christos