at run time. This simplifies the code and avoids problems with uninitialised
variables, and if it's good enough for pciide(4), it's good enough for me.
Also normalise the prefix for channel-specific messages.
necessary to allow the card to be detected afterwards. In theory, this
shouldn't be necessary, since we don't touch the page latch yet, but I'm not
going to argue.
- when moving the stylus, the cursor was updated only when the screen was
released
- when moving the stylus for too long, the kernel crashed
This was caused by improper delays in SSP read and write, and by interrupt
hammering while the screen is touched). Both led to the machine handling
interrupts all the time and been unable to schedule the X server, therefore
the lack of cursor refresh.
The problem is fixed by
- masking touchpanel interrupts as soon as we are already handling them
- creating a kernel thread (j720ssp) that takes care of keyboard and
touchpanel I/O, instead of doing it in a softintr.
- reducing delays in j720ssp_readwrite operations from 5ms to 0.1ms.
NB: If the delay in j720ssp_readwrite operation is lowered to 0.1, then
switching on the screen using the power key pushes brightness to maximum.
In order to avoid this, we introduce a wait argument to j720ssp_readwrite,
which specify how many microseconds we have to wait. j720ssp_readwrite is
called with wait = 100 everywhere except in j720lcdparam where it is called
with wait = 500. That way it works.
If two signals are sent after each other without the process being run in
userspace between them then the second one will overwrite part of the signal
info stored on the userstack.
Fixed by rewriting and simplifying both the signal delivery code and the
trampoline code. Also bump signal version number to 2.
problem, such that a TLB miss no longer occurs.
With the above, it is now safe to enable write-back caching for userland
mappings.
TODO: Deal with cache issues for shared mappings with different VAs.
- Add event counters for some key pmap events (similar to mpc6xx pmap).
- Use the cache-friendly, optimised copy/zero page functions.
- Add the necessary cache management code to enable WriteBack caching
of KSEG1 mappings. Seems to work fine so far.
* Fix problems with the DMA and SCSI drivers.
* Make turbo machines sort of work.
Additional fixes from me:
* Determine if we're a turbo at boot time, by looking at the ROM machine type.
* Set the display size correctly (1120 pixels wide, but padded to 1152 only on
non-turbo machines).
Caveats:
* SCSI doesn't work on the turbo (or at least it blows chunks with no devices
attached).
* Media selection doesn't work on the turbo (the BMAP stuff doesn't exist on
turbo machines).
* The boot block is prone to timing out.
- Use the PMAP_ASID_* constants from pmap.h
- Track pmap_pvo_{enter,remove}() depth in the same way as mpc6xx's pmap
(on which this pmap was originally based).
- Some misc. tidying up and added commentary.
- Use the VA/KVA to select whether to use the IPT or PTEG instead of
checking which pmap is being operated on.
- Add a handy DDB-callable function which will scan the kernel IPT
looking for inconsitencies.
- Finally, when unmapping a pool page, purge the data cache for the
page. This permits write-back caching to be enabled for kernel
text/data.
machine-specific code.
- Re-work the code which detects a nested critical section event.
We can now determine who is the owner of the critical section, and
what event occurred while it was owned.
- Work-around a silicon bug which can cause a nested critical event.
In the _EXCEPTION_ENTRY() macro (which sets up the critical section),
if there is a pending hardware interrupt which has a higher priority
than the current IMASK, then the "putcon" which supposedly clears SR.BL
and sets SR.IMASK to 0xf is not atomic. The pending hardware interrupt
will be taken, causing a nested critical section event. The work-around
is to update SR.BL and SR.IMASK separately using two "putcon" insns.
- Make it possible to at least *try* to resume execution if we
get an NMI.
- Major clean-up of the panic/critical section trap handlers.
The dumped state is now much more accurate.
