Commit Graph

2 Commits

Author SHA1 Message Date
thorpej af66038f73 Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
2001-11-14 18:15:10 +00:00
thorpej 16b9c60621 A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU).  There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.
2001-05-28 16:22:13 +00:00