Commit Graph

472 Commits

Author SHA1 Message Date
simonb
2d8577fb83 Clean up some rampant code duplication wrt ieee number handling:
- Add alignment-safe double and float unions.
 - Use the above for the __infinity and __nan constants on all
   architectures that use the standard ieee754 representation of
   those constants.
 - Add a single copy of various ieee754 math functions (frexp, isinf,
   isnan, ldexp and modf) that had numerous duplicates among the
   arch-specific directories.
 - Use the above functions on all architectures where the generic C
   versions where used.  Architectures that had local assembly
   routines are untouched (for those functions only).
2002-02-19 13:08:12 +00:00
simonb
4a188395df Make the ddb_regs declaration an extern in db_machdep.h and declare it on
db_interface.c.
2002-02-15 07:32:34 +00:00
thorpej
90544559d3 Don't put `frompc' into a0 in the delay slot of the __mcount
call; `jal __mcount' might be expanded by the assembler, and
thus a bogus `frompc' value could be passed.
2002-02-05 07:12:20 +00:00
shin
69d0f55255 add VR4131 cache-op bug workaround code.
we can't use Hit_WriteBack_Invalidate.
2002-01-19 04:25:36 +00:00
enami
5c12da5b4a Define new macro to access FSR register and use it. 2002-01-12 01:40:36 +00:00
uch
e4130f57f1 _intr_suspend and _intr_resume declarations are moved to intr.h. 2002-01-02 12:36:20 +00:00
shin
b7e3f7d6e3 R4000/R4400 always detects virtual alias as if
primary cache size is 32KB. Actual primary cache size
is ignored wrt VCED/VCEI.
2001-12-28 04:06:06 +00:00
takemura
490f777a1f Added Vr4131 support. 2001-12-23 13:10:46 +00:00
thorpej
51535d4bf5 Add support for dumping ELF-cormat core files. 2001-12-09 23:05:56 +00:00
uch
2c8098281b TX39, R5900 cache configuration. 2001-12-02 10:37:25 +00:00
manu
55c08f5ede Back out the copy of theses files to userland 2001-11-28 20:13:34 +00:00
manu
fa1e4588d9 We need to copy new SVR4 header files to /usr/include/sys... 2001-11-28 12:13:49 +00:00
manu
f73e64b4be Added support for COMPAT_IRIX 2001-11-28 11:54:15 +00:00
uch
6bd02d8e33 add #ifndef _LOCORE. 2001-11-23 15:48:40 +00:00
tsutsui
d8879382cf Add 32B/l L1 D/I-cache ops for newer ARC machines. 2001-11-23 06:21:49 +00:00
thorpej
6e69c4e62c Add mips_dcache_align and mips_dcache_align_mask variables that
contain information suitable for allowing other parts of the kernel
to determine if a memory region is aligned to the largest data cache
line size present in the system.

Add a mips_dcache_compute_align() function which must be called whenever
one of the data cache line size variables is changed, in order to
compute mips_dcache_align and mips_dcache_align_mask.
2001-11-19 01:28:07 +00:00
thorpej
e6cab2e799 Add 128b/l L2 cache ops. 2001-11-18 18:46:20 +00:00
soren
662f877587 MAXSLP is defined to be a machine-independent scheduling parameter,
so move it into sys/param.h.
2001-11-15 18:06:11 +00:00
thorpej
bd15cfaed8 Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
2001-11-14 18:26:21 +00:00
thorpej
af66038f73 Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
2001-11-14 18:15:10 +00:00
thorpej
47514a31be Remove unneeded declarations of the db_machine_init() function. The
ARM ports are the only ones that actually have one, and it is about
to change.
2001-11-09 06:52:23 +00:00
uch
d8c8db85ef R5900 support.
COP0_SYNC
	In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
	if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
 IPL_ICU_MASK
	mask interrupt directly ICU instead of SR.IM.
	I've added this feature to support software interrupt for R5900.
	and this option may be useful for platform which has cascaded ICU.
2001-10-16 16:31:32 +00:00
simonb
4471b94432 This Makefile.inc is used for building LKMS - add the standard MIPS
kernel compile flags as well as "-mlong-calls" so that calls from the
LKM in KSEG2 work to the kernel in KSEG0.

MIPS LKMs now build and can be loaded with the right Magick command line
args to modload(8).  Changes to modload coming...

Thanks to Chris Demetriou for pointing out the -mlong-calls gcc option
that had been staring me in the face all along.
2001-10-05 15:36:46 +00:00
chris
0e7661f023 Update pmap_update to now take the updated pmap as an argument.
This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment.

Currently this is a no-op on most platforms, so they should see no difference.

Reviewed by Jason.
2001-09-10 21:19:08 +00:00
simonb
c3c682fc46 Oops, <sys/sched.h> isn't asm safe, move inside an "#ifndef LOCORE" block. 2001-09-04 09:23:27 +00:00
simonb
62fb390c64 May as well include <mips/cpuregs.h> in <mips/cpu.h> once rather than
in every MIPS port's <machine/cpu.h>.
2001-09-04 06:23:15 +00:00
simonb
214f5366ea Centralise struct cpu_info declaration and related info to <mips/cpu.h>. 2001-09-04 06:19:21 +00:00
simonb
11362870f4 Reorder some function prototypes more logically. 2001-08-18 04:13:28 +00:00
simonb
02f580ae38 Fix lint problem introduced in last change - if `lint' is defined,
#define away __alignof__.  Still produces some warnings, but at least
they're not fatal anymore.

Problem noted by Rafal Boni in private mail.
2001-08-18 03:27:02 +00:00
simonb
0667c562f6 Describe the widths of various coprocessor 0 registers (for mips1,
mips3, mips32 and mips64).
2001-08-17 07:53:33 +00:00
simonb
b2b2f7ccfa Fix va_arg() problem when adjusting argument pointer when a structure is
passed which is larger than an int but has int alignment.  As well as
fixing the described problem, this is the same way it is handled in the
Irix and Ultrix header files.

Problem and suggested solution by Uros Prestor in port-mips mailling
list.
2001-08-17 07:15:16 +00:00
simonb
28a25d9058 _Never_ make a cosmetic change to a comment without test-compiling... 2001-08-15 14:27:00 +00:00
simonb
e77212ece8 Add some MIPS, Alchemy and SiByte CPU PRIDs (from oss.sgi.com). 2001-08-15 03:01:37 +00:00
simonb
d1cb410de4 Add Alchemy and SiByte company IDs (from oss.sgi.com). 2001-08-15 02:45:08 +00:00
simonb
4c76cec1d3 Remove parameter names from function prototypes. 2001-08-15 02:43:34 +00:00
soda
7e7514b7f1 OP_BLTZAL was defined twice. 2001-08-13 18:48:48 +00:00
chs
f6a81a1ac7 remove the uncached idle-loop page zeroing.
(to be replaced by a version that uses the cache...)
2001-08-04 04:26:48 +00:00
simonb
19014d376c Modernise data and stack size limits. 2001-07-18 04:15:55 +00:00
thorpej
8eb3b954f1 Don't need to prototype child_return() here, it's in <sys/proc.h>. 2001-06-14 22:56:55 +00:00
thorpej
ba52d7a5d0 Always indirect through the "locoresw" to get the cache ops, since
there are just far too many combinations to handle with magic
#ifdefs in any sane way.  Also, add a HitFlushDCache op to the
"locoresw", and fill it in as appropriate (it's NULL on MIPS-I,
so watch out).

These changes ensure that my R4600 Indy (with 2-way cache) gets
the correct cache ops when the kernel is built with only MIPS3
support, resulting in a kernel that is significantly more stable.
2001-06-11 23:52:38 +00:00
wiz
40ac848024 Fix various misspellings of compatible/compatibility. 2001-06-11 01:50:48 +00:00
nisimura
c227148511 PRiD 0x18 is shared by RC32334, 332 and 355. These SoCs are
distinguished by SYSID register in the system controller.  Note
that PRiD 0x20 is for a standalone RC32364 processor which has the
same 32300 core inside.  Rather better to name them MIPS32 ISA.
2001-05-31 02:06:26 +00:00
soren
72943f1165 Pasto. 2001-05-30 12:52:06 +00:00
nisimura
16a60efd2c Add PRiD 0x18 for IDT RC32332/RC32334 processors. 2001-05-30 07:21:51 +00:00
chs
e44e9dec8a replace vm_page_t with struct vm_page *. 2001-05-26 21:27:02 +00:00
chs
118ddca24a replace {simple_,}lock{_data,}_t with struct {simple,}lock {,*}. 2001-05-26 16:32:40 +00:00
simonb
a411a63d8e Add the processor IDs for the 4Kc and 5Kc CPUs and some MIPS32/64
coprocessor 0 registers.
2001-05-15 21:48:50 +00:00
simonb
6a511e05e2 Be consistent with limit constants:
- use "U" suffix for unsigned constants
 - use "L" suffix for long constants
 - use "UL" suffix for unsigned long constants
 - use hexadecimal instead of decimal

Fixes build problems with vi (now that warnings/errors are enabled) on
mips, powerpc and arm platforms.
2001-05-04 15:12:32 +00:00
thorpej
cf67ac7122 Per discussion w/ chuck and chuck, restructure the md page stuff
to use a structure called "vm_page_md", and use __HAVE_VM_PAGE_MD
and __HAVE_PMAP_PHYSSEG.
2001-05-01 02:19:13 +00:00
thorpej
2b27ac7a99 Add a VM_MDPAGE_MEMBERS macro that defines pmap-specific data for
each vm_page structure.  Add a VM_MDPAGE_INIT() macro to init this
data when pages are initialized by UVM.  These macros are mandatory,
but ports may #define them to nothing if they are not needed/used.

This deprecates struct pmap_physseg.  As a transitional measure,
allow a port to #define PMAP_PHYSSEG so that it can continue to
use it until its pmap is converted to use VM_MDPAGE_MEMBERS.

Use all this stuff to eliminate a lot of extra work in the Alpha
pmap module (it's smaller and faster now).  Changes to other pmap
modules will follow.
2001-04-29 22:44:31 +00:00