the opportunity to handle an ioctl before generic ifioctl handling
occurs. This will ease extending the kernel and sharing of code
between drivers.
First steps: Make the signature of ifioctl_common() match struct
ifinet->if_ioctl. Convert SIOCSIFCAP and SIOCSIFMTU to the new
ifioctl() regime, throughout the kernel.
handling, ether_mediastatus() and ether_mediachange(). Check for
a non-ENXIO error return from mii_mediachg(). (ENXIO indicates
that a PHY is suspended.)
This patch shrinks the source code size by 979 lines. There was
a 5100-byte savings on the NetBSD/i386 kernel configuration, ALL.
I have made a few miscellaneous changes, too:
gem(4): use LIST_EMPTY(), LIST_FOREACH().
mtd(4): handle media ioctls, for a change!
axe(4): do not track link status in sc->axe_link any longer
nfe(4), aue(4), axe(4), udav(4), url(4): do not reset all PHYs
on a change of media
Except for the change to mtd(4), no functional changes are intended.
XXX This patch affects more architectures than I can feasibly
XXX compile and run. I have compiled macppc, sparc64, i386. I
XXX have run the patches on i386 boxen with bnx(4) and sip(4).
XXX Compiling and running on evbmips (MERAKI, ADM5120) is in
XXX progress.
which expects a properly filled mbuf chain, but bus_dmamap_load for the
mbuf storage space instead.
- If the chip supports jumbo frames
+ keep track of which RX descriptor uses which jumbo mbuf buffer, so
that we can rewrite the physaddr field of the descriptor later, as it
might be partially overwritten by the hw
+ when we're out of jumbo mbufs, and if the packet is small enough,
copy it into a cluster mbuf
Those changes make my nfe(4) stable in both cases (defining NFE_NO_JUMBO
for the first one).
In nfe_start() do a fast return if IFF_OACTIVE is set, in
this case we need a Tx interrupt to clean up the DMA ring
before if_start can be properly called.
error = (cmd == SIOCADDMULTI) ?
ether_addmulti(ifr, &sc->sc_ec) :
ether_delmulti(ifr, &sc->sc_ec);
if (error == ENETRESET) {
to this,
if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) {
which does the same thing.
(A bazillion is a very large number. This seems to make the i386
ALL kernel smaller by 3kB to 4kB.)
Use ifreq_getaddr() twice in es(4).
Whitespace nits.
- make DMA descriptors volatile to avoid possible unintended reordering
which might cause some race conditions
- process interrupts until all NFE_IRQ_WANTED bits are handled
and also put misc fixes:
- return 1 and call nfe_start() in nfe_intr() only if any own interrupts
are actually handled
- use bus_dmamap_load_mbuf(9) for RX mbufs rather than bus_dmamap_load(9)
with mtod(9) and MCLBYTES
- check sc->txq.queued to see if TX descriptors are queued or handled
in nfe_start() and nfe_txeof()
- use proper BUS_DMASYNC_{PRE,POST} ops
- prepare and use NFE_[RT]X_NEXTDESC() macro
- rename NFE_TX_TCP_CSUM to NFE_TX_TCP_UDP_CSUM since it also enables
hardware udp4csum-tx for UDP4 packets
- some minor optimization
- misc KNF
Tested and confirmed by matthew green by
"to send >25MB/sec to nfe0 for over one hour,"
and also tested by me (with light TRX load on 100baseTX though)
for a month.
with other users who have been experiencing watchdog timeouts:
* Mask all interrupts while servicing a tx or rx interrupt.
* On init, clear IRQ status registers (workaround for buggy netbooters).
> Defer setting of the valid bit in the first TX descriptor after
> all descriptors have been setup. Otherwise, hardware may start
> processing descriptors faster than us and crap out.
> Fixes "watchdog timeout" errors.
>
> Original idea from Matthew Dillon @DragonFly.
- print PCI device name and revision
- print interrupt and Ethernet address like other devices
Before:
---
nfe0 at pci0 dev 5 function 0LKLN: Picked IRQ 20 with weight 1
: ioapic0 pin 20 (irq 9), address xx:xx:xx:xx:xx:xx
After:
---
nfe0 at pci0 dev 5 function 0: NVIDIA nForce3 ethernet #4 (rev. 0xa2)
LKLN: Picked IRQ 20 with weight 1
nfe0: interrupting at ioapic0 pin 20 (irq 9)
nfe0: Ethernet address xx:xx:xx:xx:xx:xx
(note "Picked IRQ" message is logged by aprint_verbose(9) in acpi(4))
jmcneill