like the SMC83C100 EPIC/100 driver:
* Rather than using pointers to the head and tail of the transmit and
receive rings, use wrapping indexes into arrays. This is a little more
obvious when reading the code.
* More cleanly separate the hardware descriptor from the software descriptor.
* bus_dma it everywhere.
* Implement interrupt pacing and avoid a potential race in the transmit
loop.
Now this looks more or less like the Rhine driver I was working on when
this driver was committed :-) Update copyright notice to reflect that.
has the same 4-byte alignment requirement that the transmit side does. This
causes the packet payload to be misaligned. So, on systems which require
strict alignment, we must copy the incoming frame to a new packet buffer,
suitably aligned.
thorpej