Commit Graph

51750 Commits

Author SHA1 Message Date
macallan
a83a5dd561 enable omapfb and related stuff 2010-08-31 19:07:01 +00:00
macallan
704f7610df a simple console driver for the OMAP 3xxx on-chip video
no acceleration so far and it will recycle whatever video mode the firmware
set up
2010-08-31 19:03:55 +00:00
tsutsui
287b6acad1 - split device_t/softc
- include "ioconf.h" for struct cfdriver
2010-08-31 15:17:20 +00:00
kiyohara
8e229474be Fix lost interrupt. (2/2)
+ It is likely to lose sight of interrupt when the interrupt of irq_base
    that is smaller than the same at the level is generated if PIC_MAXSOURCES
    is 33 or more.
2010-08-31 14:33:41 +00:00
kiyohara
4edbb19773 Fix lost interrupt. (1/2)
+ Change blocked_irqs that dispach if change pending_irqs in the loop.
2010-08-31 14:23:27 +00:00
tsutsui
1f68cc819a Set bp->b_resid properly after data transfer is complete.
Fixes unexpected "Bad address" errors on file read ops since January 2006.

The problem is reported and tracked by Yasushi Oshima.
2010-08-31 12:12:48 +00:00
macallan
60cbfd8fa2 remove shadow framebuffer support, use VCONS_DONT_READ instead 2010-08-31 03:08:23 +00:00
kiyohara
8c7e8c667b Support prcm@obio1. 2010-08-30 05:37:30 +00:00
joerg
c1e0a5bd50 Replace the current usage of Elf64_Half with Elf64_Word and rename
NetBSD specific Elf64_Quarter to Elf64_Half. This restores compatibility
with the common ELF specifications.
2010-08-28 21:30:02 +00:00
tsutsui
189acfdc99 Enable options COMPAT_16 for old distributed.net client binaries. 2010-08-28 14:50:21 +00:00
ahoka
2c54ccb139 include prcm.h for NPRCM 2010-08-28 13:42:12 +00:00
ahoka
c31250161a Add basic support for PRCM in omap devices, and use it to cold reset
the cpu in cpu_reboot();

Note: the driver only supports the cold reset action at the moment.

Enable it in BEAGLEBOARD
2010-08-28 13:02:32 +00:00
kiyohara
7b57451a85 Fix build fail.
+ Include opt_omap.h, if defined OVERO.
  + Fix the pair of parentheses.
2010-08-28 07:13:47 +00:00
kiyohara
c3c2133955 Fix build failed. omap2_intr.h includes, if defined OMAP3530. 2010-08-28 07:06:29 +00:00
kiyohara
d3579ee238 Fix typo. 2010-08-28 04:59:22 +00:00
kiyohara
9190240781 Change size number to hexadecimal. 2010-08-28 04:58:49 +00:00
kiyohara
1fe3097332 Support smsh@gpmc.
tested Chestnut43 only.
2010-08-28 04:54:46 +00:00
kiyohara
39e2f24fea + Add parsing keyword 'expansion=' in args from U-boot. And keep backword
compatibility 'busheader=', in case Gumstix.
+ Add GPMC device map to gumstix_devmap[].
2010-08-28 04:46:24 +00:00
kiyohara
7ccc7ee0c4 + Add configuration function for NIC of Chestnut43/Tobi/Tobi-Duo.
tested Chestnut43 only.
+ Remove parenthesis for return.
2010-08-28 04:39:42 +00:00
kiyohara
015c25e57a Remove a white space. 2010-08-28 04:33:00 +00:00
kiyohara
ab81e3684b + Struct smsh_gxio is obsolated, and struct lan9118_softc is used.
We do not have private data at all.
+ Fix typo.  sms_gxio_attach -> smsh_gxio_attach
2010-08-28 04:30:24 +00:00
kiyohara
d3d549f1e0 Disable L2 Cache when boot time. 2010-08-28 04:12:40 +00:00
kiyohara
61c272ff75 Fix PIC_MAXMAXSOURCES (96+160) to (96+192). OMAP35xx has 32bit GPIO x6. 2010-08-28 04:06:40 +00:00
kiyohara
c7f15660e5 + Add some GPMC_CONFIG7 macros and replace magic-number to it.
+ Indent.
2010-08-28 04:03:51 +00:00
kiyohara
0f7b7aadb8 Remove white-space and null-line. 2010-08-28 04:00:35 +00:00
christos
7709732cb2 factor out the floppy detection code. 2010-08-25 20:16:48 +00:00
christos
f2b34c1443 Don't LOAD_BACKWARDS for floppies. 2010-08-25 18:11:54 +00:00
christos
d5a8010acd kill LOAD_MINIMAL. 2010-08-25 16:38:04 +00:00
christos
103e114aab s/LOAD_NOTE/LOAD_BACKWARDS/ 2010-08-25 16:35:57 +00:00
christos
bf07f8896d s/LOAD_NOTE/LOAD_BACKWARDS 2010-08-25 16:35:02 +00:00
christos
3ef8f70c7a s/LOAD_NOTE/LOAD_BACKWARDS/ 2010-08-25 16:33:51 +00:00
christos
7720d15c03 use LOAD_BACKWARDS instead of LOAD_NOTE for floppy book. 2010-08-25 16:32:51 +00:00
christos
6b3899fd66 change LOAD_NOTE to LOAD_BACKWARDS 2010-08-25 16:30:44 +00:00
christos
26c8040050 Try to detect if we are doing a floppy boot from the device name and if
we are, load the minimal set to avoid backwards seeks.
2010-08-25 16:24:45 +00:00
jruoho
cff1577a2c Add definitions for Intel Digital Thermal Sensor and Power Management, at
CPUID Fn0000_0006, %eax, %ecx. Use these instead of magic numbers.
2010-08-25 05:07:43 +00:00
jruoho
465d00f837 As all reported P-state failures so far have centered around the status-
check (today it was christos@' laptop), follow Linux and disable this rather
expensive sanity-check for the time being. A hypothesis about the cause of
the failures relates to the absence of cross-CPU coordination in the current
implementation.
2010-08-24 10:29:53 +00:00
jruoho
42a7d04b04 Add native support for AMD family 0Fh processors. This is the furthest we
will go backwards; K7 will not be supported already due doubts about
availability and reliability of ACPI during that era. Some unfortunate code
duplication is present (but not overly much). Thanks to cegger@ and jakllsch@
for patiently testing this.
2010-08-24 07:27:59 +00:00
jruoho
4f4a7a5d46 Other entry points beyond x86_cpu_idle_halt() may use HLT as the
idle-mechanism. Send an IPI also for these in cpu_need_resched().
2010-08-23 16:20:44 +00:00
jakllsch
785fb07d78 Move FWH chip detection area entirely within the mapping for
the smaller i82802AB. This is needed as not all BIOSes set a
larger-than-necessary decode range.
2010-08-23 02:57:19 +00:00
rmind
2e6f2099c6 Import NPF - a packet filter. Some features:
- Designed to be fully MP-safe and highly efficient.

- Tables/IP sets (hash or red-black tree) for high performance lookups.

- Stateful filtering and Network Address Port Translation (NAPT).
  Framework for application level gateways (ALGs).

- Packet inspection engine called n-code processor - inspired by BPF -
  supporting generic RISC-like and specific CISC-like instructions for
  common patterns (e.g. IPv4 address matching).  See npf_ncode(9) manual.

- Convenient userland utility npfctl(8) with npf.conf(8).

NOTE: This is not yet a fully capable alternative to PF or IPFilter.
Further work (support for binat/rdr, return-rst/return-icmp, common ALGs,
state saving/restoring, logging, etc) is in progress.

Thanks a lot to Matt Thomas for various useful comments and code review.
Aye by: board@
2010-08-22 18:56:18 +00:00
jruoho
89188f9d4a Still DELAY(9) a little even when we do not do the status-check. 2010-08-22 04:42:57 +00:00
jruoho
22b91511fc After discussion with jakllsch@ and jmcneill@, revert the previous and only
do the status-check when the comparison value reported by BIOS is not zero.
The uncertainty noted in the previous commit still applies. But if we ever
see a timeout again, it will likely be either a firmware bug or a special
case like the Intel Turbo Boost.
2010-08-21 18:25:45 +00:00
jmcneill
2055dab9df I guess people still attach com & lpt to isa, so don't skip legacy devices. 2010-08-21 17:27:20 +00:00
jmcneill
7ae909373c If ACPI is active and the FADT reports no legacy devices present, set
the 'no-legacy-devices' property to true on isa0.
2010-08-21 17:10:03 +00:00
jruoho
2f766899a8 When we do the sanity check that a P- or T-state transition was successful,
compare also against the control-field. There appears to be many BIOSes in
the field that report a zero value in the status-field. It is unclear whether
this should be taken as a hint that the status-check is not necessary also
during P-state transitions. If we still see timeouts (EAGAIN), this should
be reverted and the status-check should be bypassed if ps->ps_status is 0.
2010-08-21 15:37:35 +00:00
jmcneill
550cccfc5c enable viadrm 2010-08-21 11:55:21 +00:00
jruoho
57af947c67 Use an inverse logic when filling the (X)PSS structures -- if we know
the addresses, we trust ourselves more than a random BIOS in the field.
2010-08-21 09:16:28 +00:00
jruoho
7aac1c3ec2 Add a comment. 2010-08-21 07:18:34 +00:00
jruoho
497fed0a50 Check from CPUID 0x06 %eax (on Intel) whether we might actually have an
invariant APIC timer or an "ARAT" ("always running APIC timer"). This means
that the APIC timer may keep ticking at the same rate also in deep C-states
with some new or forthcoming Intel CPUs.
2010-08-21 06:45:50 +00:00
jruoho
503e356fbc Add a quirk for Turbo Boost.
It was observed that at least Sverre Froyen's ThinkPad T500 reports values
that do not match readings from the IA32_PERF_STATUS register. This only
applied to the P0-state. Thus, for now, skip the status check if Turbo
Boost has been detected and the requested state is P0.

This needs to be revisited once Turbo Boost actually works in NetBSD. It is
unclear whether this is a BIOS flaw or not; these values may well be what we
get from IA32_PERF_STATUS once the CPU actually uses the +133.33 MHz boost.
2010-08-21 05:10:43 +00:00