rafal
33fcc94c6f
Add support for R5k secondary caches, from code Chris Sekiya sent me a long
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time ago, with small tweaks by me. Since the R5k doesn't do VCE, the pmap
still needs to be whacked for R5kSC CPUs to work correctly, but this is a
start.
2003-03-08 04:43:24 +00:00
simonb
8883b06039
No need to protect headers with #ifdef _KERNEL if they're never installed
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in /usr/include.
2003-02-17 11:35:01 +00:00
simonb
5e3d4a224c
Add cache_r4k_op_8lines_{16,32} macros to perform cache ops on 8
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consecutive lines.
2002-11-17 06:40:43 +00:00
simonb
8070cbd848
Add 4way 16/32-byte-line cache op primitives.
2002-03-05 14:32:26 +00:00
shin
69d0f55255
add VR4131 cache-op bug workaround code.
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we can't use Hit_WriteBack_Invalidate.
2002-01-19 04:25:36 +00:00
takemura
490f777a1f
Added Vr4131 support.
2001-12-23 13:10:46 +00:00
tsutsui
d8879382cf
Add 32B/l L1 D/I-cache ops for newer ARC machines.
2001-11-23 06:21:49 +00:00
thorpej
e6cab2e799
Add 128b/l L2 cache ops.
2001-11-18 18:46:20 +00:00
thorpej
bd15cfaed8
Merge the thorpej-mips-cache branch onto the trunk. This is an
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overhaul of how caches are handled for NetBSD's MIPS ports.
2001-11-14 18:26:21 +00:00