Don't set the default value not in the attach function. Instead, set the
default value (MII_ANEGTICKS) first in the beginning of the
mii_phy_add_media(). The function already has the code to change the value to
MII_ANEGTICKS_GIGE if it's gigabit capable.
- Remove extra pmf_device_register() call. It's done in mii_phy_add_media().
int (*mii_readreg_t)(device_t, int, int);
void (*mii_writereg_t)(device_t, int, int, int);
to:
int (*mii_readreg_t)(device_t, int, int, uint16_t *);
int (*mii_writereg_t)(device_t, int, int, uint16_t);
Now we can test if a read/write operation failed or not by the return value.
In 802.3 spec says that the PHY shall not respond to read/write transaction
to the unimplemented register(22.2.4.3). Detecting timeout can be used to
check whether a register is implemented or not (if the register conforms to
the spec). ukphy(4) can be used this for MII_MMDACR and MII_MMDAADR.
Note that I noticed that the following code do infinite loop in the
read/wirte function. If it accesses unimplemented PHY register, it will hang.
It should be fixed:
arm/at91/at91emac.c
arm/ep93xx/epe.c
arm/omap/omapl1x_emac.c
mips/ralink/ralink_eth.c
arch/powerpc/booke/dev/pq3etsec.c(read)
dev/cadence/if_cemac.c <- hkenken
dev/ic/lan9118.c
Tested with the following device:
axe+ukphy
axe+rgephy
axen+rgephy (tested by Andrius V)
wm+atphy
wm+ukphy
wm+igphy
wm+ihphy
wm+makphy
sk+makphy
sk+brgphy
sk+gentbi
msk+makphy
sip+icsphy
sip+ukphy
re+rgephy
bge+brgphy
bnx+brgphy
gsip+gphyter
rtk+rlphy
fxp+inphy (tested by Andrius V)
tlp+acphy
ex+exphy
epic+qsphy
vge+ciphy (tested by Andrius V)
vr+ukphy (tested by Andrius V)
vte+ukphy (tested by Andrius V)
Not tested (MAC):
arm:at91emac
arm:cemac
arm:epe
arm:geminigmac
arm:enet
arm:cpsw
arm:emac(omac)
arm:emac(sunxi)
arm:npe
evbppc:temac
macppc:bm
macppc:gm
mips:aumac
mips:ae
mips:cnmac
mips:reth
mips:sbmac
playstation2:smap
powerpc:tsec
powerpc:emac(ibm4xx)
sgimips:mec
sparc:be
sf
ne(ax88190, dl10019)
awge
ep
gem
hme
smsh
mtd
sm
age
alc
ale
bce
cas
et
jme
lii
nfe
pcn
ste
stge
tl
xi
aue
mue
smsc
udav
url
Not tested (PHY):
amhphy
bmtphy
dmphy
etphy
glxtphy
ikphy
iophy
lxtphy
nsphyter
pnaphy
rdcphy
sqphy
tlphy
tqphy
urlphy
service routine. Add a wrapper for PHY_SERVICE(), called phy_service(),
and check device_is_active() there. Make the mii_*() routines call
the PHY service routines thorugh phy_service() instead of PHY_SERVICE().
In mii_phy_resume(), restore a PHY's state after resetting it by
sending a MII_MEDIACHG command. This change makes bnx(4) resume
more reliably and more quickly; it should help other NICs to resume,
too, if they attach PHYs through MII.
Seeq 84220.
Also add an 84220-specific work-around for some braindamage (at least
in the PHY I'm working with) where the PHY always comes out of reset
isolated, regardless of the previous state of the BMCR_ISO bit. This
happens even if the PHY has address zero, which is contrary to the
part's datasheet...
The work-around is only applied if we notice BMCR_ISO is set when it
should be clear following reset. The fix is to wait 30mS and clear
it manually. (The change doesn't stick if it's cleared sooner than this)
and default every PHY to 5 seconds (what we used before). If we find
Gig-E media on a PHY, bump it to 10 seconds, since it can take 5
seconds just to negotiate a Gig-E link.
instead of discrete function pointers, and extend this to include
a "reset" entry point. Make sure any PHY-specific reset routine is
always used, and provide one for the LXT-970 which disables MII
interrupts (as is done for a few other PHYs we have drivers for).
mii_softc (generic phy goo), and just switch all of the PHY drivers
(except tlphy, which really does have special stuff) to use an mii_softc
instead of a private one.
