tty structures, and on some machines (namely the DraCo internal lpt, and some
multi-i/o boards for Amigas and DraCos), tying spltty to the pretty high printer
interupt level would hurt serial performance.
On all affected ports but Amiga, spllpt() has been defined in machine/intr.h
to be spltty(), thus preserving old behaviour. Portmasters are encouraged to
change is, if they feel something else is better (e.g., one of its own were
possible).
New macros:
LOCATE_PCS(struct rpb *hwrpb, int cpu_number)
PCS_PROC_MAJORTYPE(struct pcs *)
PCS_PROC_MINORTYPE(struct pcs *)
Define LOCATE_PCS() to map (hwrpb, cpu_number) -> Per-Cpu-Slot structure.
Replace the PCS_PROC_{MAJOR,MINOR}{,SHIFT} stuff with macros that simply
return the major and minor cpu type codes.
address on 2 architectures anyhow. Also, move the definition of the `label_t'
type inside _KERNEL protection, since it is specific to the in-kernel
setjmp()/longjmp() implementations.
as with user-land programs, include files are installed by each directory
in the tree that has includes to install. (This allows more flexibility
as to what gets installed, makes 'partial installs' easier, and gives us
more options as to which machines' includes get installed at any given
time.) The old SYS_INCLUDES={symlinks,copies} behaviours are _both_
still supported, though at least one bug in the 'symlinks' case is
fixed by this change. Include files can't be build before installation,
so directories that have includes as targets (e.g. dev/pci) have to move
those targets into a different Makefile.
is defined, the bus_space macros will check to ensure that the bus address
and the target buffer (if applicable) are aligned properly for the size
of the type being used. If they are not, a message will be displayed on
the console.
Strict alignment is required by the Alpha architecture, and a trap will
occur of unaligned access is performed. These changes will aid debugging
of broken device drivers.
UVM pmap's locking protocol, written by Chuck Cranor. Not all of the
support for multiple processors is here yet, but the kernel does run
under moderate loads with LOCKDEBUG (all locking operations are no-ops
unless LOCKDEBUG is turned on).
This is by no means complete... there are still some possible snares
to take a look at.
member to the DMA tag, and calling the direct-mapped back-ends directly,
rather than through chipset-specific front-ends which pass the window
base as an additional argument.
caller to pass an optional 3rd argument, which is the previous level
PTE corresponding the virtual address. If this argument is non-NULL,
the table walk otherwise necessary will be bypassed.