If all devices can handle 66MHz, then use 66MHz.
Triple the number of configured I/O ranges that we can handle on a bus
(8 was insufficient--originally didn't consider multifunction devices)
Allow one to specify which types of memory to configure, I/O, ROM, or
MEM--for example, one could configure only ROM or only non-ROM.
Ensure that the ROM is disabled if we're not configuring it.
Only set PCI_COMMAND_IO_ENABLE/PCI_COMMAND_MEM_ENABLE if there are valid
memory ranges configured.
bus (and optionally maps expansion ROMs), and an optional second
pass to disable expansion ROMs that are mapped. This would allow
MD code to possibly execute the expansion ROMs (possibly in an x86
emulator) to configure a device (e.g. a VGA card, which pretty much
needs to be configured by its ROM).
the expansion ROMs on cards, since address decoders may be shared between
the ROM and PCI memory space on some cards (i.e. "only map the ROM if you're
going to use it, and then unmap it when you're done" is the intended
usage).
by Eduardo Horvath and Simon Burge of Wasabi Systems.
IBM 4xx series CPU features:
- New pmap and revised trap handler.
- Support on-chip timers, PCI controller, UARTs
- Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
- Add in-kernel PPC floating point emulation
- New in{,4}_cksum that is between 1.5 and 5 times faster than the
old version depending on CPU type.
General changes:
- Kernel support for generic dbsym-style symbols.
configuration (assignment of bus numbers, BARs, timer values,
interrupt lines, etc.).
The interface must be called from m.d. code prior to probing the bus.
It is meant to be called once for each primary (bus == 0) PCI bus in
the system. It will configure any busses behind PCI-PCI bridges.
Section 9 man page for pci_configure_bus() will come soon.
In the meantime, sample usage is in arch/sandpoint/sandpoint/mainbus.c.
[ Reviewed by thorpej ]
