Commit Graph

1447 Commits

Author SHA1 Message Date
simonb
b2aa917e00 Un-wrap a no-longer-too-long panic message, add some extra info to another
panic message.
2003-05-14 10:09:49 +00:00
kleink
776138ea69 Rename <sys/float_ieee.h> to <sys/float_ieee754.h>, following libc's
convention for these.
2003-05-12 15:22:53 +00:00
thorpej
36da248c07 Back out the following chagne:
http://mail-index.netbsd.org/source-changes/2003/05/08/0068.html

There were some side-effects that I didn't anticipate, and fixing them
is proving to be more difficult than I thought, do just eject for now.
Maybe one day we can look at this again.

Fixes PR kern/21517.
2003-05-10 21:10:23 +00:00
fvdl
d88cf589cb A few ISA sound drivers like to share dma channels, and hence deferred
isa_dmamap_create() calls to their open/close entrypoints. This worked
with some luck, but broke on i386 when _bus_dmamap_create started
to allocate bounce buffers upfront, since memory below 16M may well
not be available when the sound devices is opened for the Nth time.

To fix this, create a new simple interface, isa_drq_alloc/isa_drq_free,
wrappers around already existing bitmask macros. These are expected
to be used before an isa_dmamap_create call, and after an
isa_dmamap_destroy call, respectively. For the sb and ad1848 drivers,
they're deferred until open/close.

All isa_dmamap_create calls can now use BUS_DMA_ALLOCNOW and be done
at attach time.
2003-05-09 23:51:25 +00:00
thorpej
b77900c3c2 Simplify the way the bounds of the managed kernel virtual address
space is advertised to UVM by making virtual_avail and virtual_end
first-class exported variables by UVM.  Machine-dependent code is
responsible for initializing them before main() is called.  Anything
that steals KVA must adjust these variables accordingly.

This reduces the number of instances of this info from 3 to 1, and
simplifies the pmap(9) interface by removing the pmap_virtual_space()
function call, and removing two arguments from pmap_steal_memory().

This also eliminates some kludges such as having to burn kernel_map
entries on space used by the kernel and stolen KVA.

This also eliminates use of VM_{MIN,MAX}_KERNEL_ADDRESS from MI code,
this giving MD code greater flexibility over the bounds of the managed
kernel virtual address space if a given port's specific platforms can
vary in this regard (this is especially true of the evb* ports).
2003-05-08 18:13:12 +00:00
simonb
8bfe136eca Remove a duplicate load of "a1" in page_zero (a PAGE_SIZE vs NBPG botch). 2003-05-04 04:56:33 +00:00
simonb
f426b1ecfe Use 64-bit "sd" in mips_pagezero() if we're compiled for MIPS{3,4,64}
(the actual check is !MIPS1 && !MIPS32).

Do the ".set push", ".set mips3", ".set pop" dance if we use 64-bit
instructions.
2003-05-04 02:53:53 +00:00
scw
8c5c893bf7 Add a BKPT_ADDR() macro which gives MD code a chance to munge a
breakpoint address before it's used. Currently a no-op on all but sh5.

This is useful on sh5, for example, to mask off the instruction
type encoding in the bottom two address bits, and makes it possible
to do "db> break $rXX" instead of manually munging the address.
2003-04-29 17:06:03 +00:00
bjh21
4be7a2dcf3 Add a new feature-test macro, _NETBSD_SOURCE. If this is defined
by the application, all NetBSD interfaces are made visible, even
if some other feature-test macro (like _POSIX_C_SOURCE) is defined.
<sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE,
_POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve
existing behaviour.

This has two major advantages:
+ Programs that require non-POSIX facilities but define _POSIX_C_SOURCE
  can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS.
+ It makes most of the #ifs simpler, in that they're all now ORs of the
  various macros, rather than having checks for (!defined(_ANSI_SOURCE) ||
  !defined(_POSIX_C_SOURCE) || !defined(_XOPEN_SOURCE)) all over the place.

I've tried not to change the semantics of the headers in any case where
_NETBSD_SOURCE wasn't defined, but there were some places where the
current semantics were clearly mad, and retaining them was harder than
correcting them.  In particular, I've mostly normalised things so that
_ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE,
_XOPEN_SOURCE and _NETBSD_SOURCE in that order.

Tested by building for vax, encouraged by thorpej, and uncontested in
tech-userlevel for a week.
2003-04-28 23:16:11 +00:00
christos
a2dfb1b570 PR/3012: Greg A. Woods: Write all float.h files [except the vax of course]
in terms of float_ieee.h
2003-04-19 23:05:28 +00:00
nathanw
ff28c51cc0 Make cpu_getmcontext() run the PC through ras_lookup() so that kernel
getcontext() plus userlevel setcontext() (as used in libpthread) respects
the atomicity of RAS regions.
2003-04-11 22:02:28 +00:00
simonb
0cdf56e3e6 Fix a tyop in a comment. 2003-04-11 06:24:59 +00:00
thorpej
9bd03b1f69 Cast the arg to MIPS_KSEG0_TO_PHYS() in POOL_VTOPHYS() (thanks, nathan!). 2003-04-09 22:10:58 +00:00
thorpej
a0aee79a1d Add the ability for pool caches to cache the physical address of
objects.  Clients of the pool_cache API must consistently use
the "paddr" variants or not, otherwise behavior is undefined.

Enable this on Alpha, ARM, MIPS, and x86.  Other platforms must
define POOL_VTOPHYS() in the appropriate manner in order to enable
the feature.

Part 1 of a series of simple patches contributed by Wasabi Systems
to improve network performance.
2003-04-09 18:22:13 +00:00
thorpej
cf9d21bf8e Use PAGE_SIZE rather than NBPG. 2003-04-08 23:39:14 +00:00
hpeyerl
5eefd45be5 Read USBH_ENABLE twice in succession according to Errata 7 for au1500. 2003-04-03 16:41:23 +00:00
thorpej
cc2c493bc4 Use PAGE_SIZE rather than NBPG. 2003-04-02 07:35:54 +00:00
thorpej
bc226765c8 Use PAGE_SIZE rather than NBPG. 2003-04-02 03:27:35 +00:00
hpeyerl
295e297794 de-slob-ify. (I'm a slob) 2003-04-02 02:18:52 +00:00
hpeyerl
badb1c52ec OHCI front-end driver for Alchemy cpu's. We now have USB Host support.
Tested on PB1500 and DB1500 boards.
2003-04-01 17:36:45 +00:00
hpeyerl
deece0b31e s/ohci.c/ohci_aubus.c/ 2003-04-01 17:31:50 +00:00
hpeyerl
29422429f6 add defines for Alchemy clock and frequency control registers. 2003-04-01 17:30:09 +00:00
hpeyerl
56f13f6fa9 allocate an aubus dma tag. 2003-04-01 17:29:11 +00:00
hpeyerl
9cda767630 support active low, level triggered interrupts, needed for ohci front end. 2003-04-01 17:28:24 +00:00
he
fd386b5a4d Initialize new members (cn_halt and cn_flush) in consdev to NULL to
allow this to compile again.
2003-03-28 07:10:35 +00:00
simonb
d38e1fa853 Use "rxintr" for the name of the receive interrupts evcnt instead
of "txintr".  Much less confusing that way...
2003-03-27 01:21:52 +00:00
simonb
0a30e5fb17 Fix a grammatical nit. 2003-03-22 14:26:41 +00:00
simonb
3c7ff59b5b Sprinkle some "volatile"; fixes problems with the {read,write}_{1,2}
functions big-endian Au1xxx CPUs.
2003-03-13 03:04:13 +00:00
he
0f55132c91 Initialize the two new members of "struct console" to NULL so that
this file compiles again.
2003-03-08 09:42:56 +00:00
rafal
67cca2386c Protect uses of MIPS_R5000 with #ifndef ENABLE_MIPS_R3NKK in new code just
as the old code does.
2003-03-08 05:18:25 +00:00
rafal
33fcc94c6f Add support for R5k secondary caches, from code Chris Sekiya sent me a long
time ago, with small tweaks by me.  Since the R5k doesn't do VCE, the pmap
still needs to be whacked for R5kSC CPUs to work correctly, but this is a
start.
2003-03-08 04:43:24 +00:00
tshiozak
31e2cbf0b5 add some ISO C 1995 I18N functions and types:
btowc, wctrans, towctrans, wcscoll, wcsxfrm, wctype_t and wctrans_t.
2003-03-02 22:18:11 +00:00
simonb
7a3efea0bf Make whitespace in multi-way loops line up a bit nicer. 2003-02-17 12:32:13 +00:00
simonb
8883b06039 No need to protect headers with #ifdef _KERNEL if they're never installed
in /usr/include.
2003-02-17 11:35:01 +00:00
cgd
bc735179e8 use COP0_HAZARD_FPUENABLE in a couple more places when turning on FP:
In start (noticed after looking for more COP_1_BIT uses, and note
that there are extra nops here but really they don't hurt), and in
MachFPTrap (noticed by ... running regress!).
2003-02-08 00:50:33 +00:00
cgd
8a6b8c3b72 Update to consistently use Broadcom GPL-compatible license on all SiByte code. 2003-02-07 17:38:48 +00:00
cgd
045575c57d add BCM112x A2 definition 2003-02-07 17:35:05 +00:00
nakayama
e3e4805068 Replace machine/rnd.h with more appropriate name to share it
with cycle counter based microtime in kern/kern_microtime.c.
2003-02-05 13:57:50 +00:00
kent
cd7d9faeaf Introduce BUS_DMA_NOCACHE, and bus_dmamem_map() of i386 supports it. 2003-01-28 01:07:51 +00:00
simonb
d77e3b36e0 Assign to pcb->pcb_context[] in the same order in cpu_lwp_fork() and
cpu_setfunc().
2003-01-22 13:55:09 +00:00
rafal
c406903ac2 LWP'ify the svr4_mcontext stuff. 2003-01-22 04:32:17 +00:00
simonb
76cc21a34c Fix a tyop and some white-space nits. 2003-01-21 04:26:01 +00:00
thorpej
706b88727b Fix typo in sigcontext conversion macros. From Christopher SEKIYA. 2003-01-20 16:28:13 +00:00
tsutsui
aa4186745b Add '#define' for _MCONTEXT_TO_SIGCONTEXT(). 2003-01-18 13:03:17 +00:00
thorpej
a50e3bc1cb Merge the nathanw_sa branch. 2003-01-17 22:58:53 +00:00
simonb
b2e8253950 Zero out the TX buffer when padding packet to ETHER_MIN_LEN-ETHER_CRC_LEN. 2003-01-17 12:40:20 +00:00
simonb
c018fbe68d Tidy up event counter increments a little. 2003-01-16 01:14:17 +00:00
simonb
c69f520bc8 Removed unused register map; this info is now passed in with the attach
args.
2003-01-16 01:05:39 +00:00
rafal
0cc0813590 Add the MIPS3_CONFIG_SE (name taken from Rm52xx manual) bit, which is the
external cache enable bit -- this allows software to enable or disable the
(external) L2 cache on the R5k and Rm527x and the (external) L3 cache on
the Rm7k.  If the (external) cache is disabled, treat it as if there were
no cache for the purposes of the cache setup code.

Also, update sgimips code to use the new name.
2003-01-10 03:22:48 +00:00
wiz
1035faff1d writable, not writeable. 2003-01-06 20:30:28 +00:00