directly, using the trampoline only for the return path. Saves a jsr and
movqd insn in the trampoline.
Changes gratuitously ripped off the i386 work for same.
0xc0200000. Tidy up to remove dead comments and code.
Allow more than one L1 entry for the kernel space and use the 'spare'
memory below the kernel code for the initial page tables in the same
way that the iq80310 does.
BIOS calls can be used for device probing etc.
And now it's getting nasty:
The kvm86 code needs a TSS, and it is most convenient to use proc0's
instead of doing some static allocation. (We might reconsider this if
we want to use vm86 for console initialization, ie much earlier.)
For the TSS slot to be allocated, we have to move the call to
i386_proc0_tss_ldt_init() up.
Since the npx code twiddles CR0 the corresponding pcb field must
be synchronized later. It would probably be cleaner to do this in
the npx driver.
8086 machine. Ifff it works, it is much easier and more elegant than
going to real real mode:
-simpler code
-no need for "identity" memory mappings
-easy passing of buffers for bulk data to functions
-some more control
There is no interrupt support ATM, and it lacks a function to access
random virtual memory of the VM. MP issues to consider.
- accumulating all emulation code (including floating-point) in one place
- steal MachFPInterrupt() back from SOFTFLOAT for use only with interrupts
and traps from *real* FPUs
- introducing MachEmulateInst() as a common dispatch point for all
emulated instructions
- cleaning up emulation dispatch in trap()
Also, while we're here, implement MIPS2 LL/SC/SYNC emulation for MIPS1.
Tested on r3k with and without SOFTFLOAT enabled.
Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c
Also move softnet, install_extintr, mapiodev, kvtop. Add common BAT
initialization code.
Add user Altivec support.
Fix calls to OF_call_method in macppc/macppc/machdep.c.
Use ci_fpuproc in cpu_info instead of separate fpuproc.
Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.
MALLOC_NOINLINE, and VNODE_OP_NOINLINE. The exceptions are when they
include another config files that already defines the options, or if
they are for an embedded board, just define a few extra options, and
do not already define PIPE_SOCKETPAIR.
SH-5, meet NetBSD.
Let's hope this is the start of a long and fruitful relationship. :-)
This code, funded by Wasabi Systems, adds initial support for the
Hitachi SuperH(tm) SH-5 cpu architecture to NetBSD.
At the present time, NetBSD/evbsh5 only runs on a SH-5 core simulator
which has no simulated devices other than a simple console. However, it
is good enough to get to the "root device: " prompt.
Device driver support for Real SH-5 Hardware is in place, particularly for
supporting the up-coming Cayman evaluation board, and should be quite
easy to get running when the hardware is available.
There is no in-tree toolchain for this port at this time. Gcc-current has
rudimentary SH-5 support but it is known to be buggy. A working toolchain
was obtained from SuperH to facilitate this port. Gcc-current will be
fixed in due course.
The SH-5 architecture is fully 64-bit capable, although NetBSD/evbsh5 has
currently only been tested in 32-bit mode. It is bi-endian, via a boot-
time option and it also has an "SHcompact" mode in which it will execute
SH-[34] user-land instructions.
For more information on the SH-5, see www.superh.com. Suffice to say it
is *not* just another respin of the SH-[34].
* struct sigacts gets a new sigact_sigdesc structure, which has the
sigaction and the trampoline/version. Version 0 means "legacy kernel
provided trampoline". Other versions are coordinated with machine-
dependent code in libc.
* sigaction1() grows two more arguments -- the trampoline pointer and
the trampoline version.
* A new __sigaction_sigtramp() system call is provided to register a
trampoline along with a signal handler.
* The handler is no longer passed to sensig() functions. Instead,
sendsig() looks up the handler by peeking in the sigacts for the
process getting the signal (since it has to look in there for the
trampoline anyway).
* Native sendsig() functions now select the appropriate trampoline and
its arguments based on the trampoline version in the sigacts.
Changes to libc to use the new facility will be checked in later. Kernel
version not bumped; we will ride the 1.6C bump made recently.
mappings bus_dma(9) states: "In the event that the DMA handle contains
a valid mapping, the mapping will be unloaded via the same mechanism
used by bus_dmamap_unload()." And some drivers do mean to skip the
unload step.
16 SR registers when transitioning between kernel and user. Also, don't
reload the kernel SR(s) on every trap but only on traps from user space.
Instead of loading magic SRs for the kernel, load the kernel SRs from the
kernel_pmap_. This makes trap_subr.S completely ignorant of SR uses and
so they can change with having to change trap_subr.S. Also note that
since the user and kernel get complete SR sets, user VA space can now be
increased to 4GB if desired.
Note that we never use a PTE PP of 0 or 1 (supervisor protection) so the
"key" is basically unused. However, use SR_PRKEY for user space is
conceptionally the right thing to do. Currently the kernel_pmap SR(s) are
ignored but that is going to be fixed shortly.
- replace all "atapibus* at XXXX" with a single "atapibus* at atapi?"
- replace all "audio* at XXXX" with a single "audio* at audiobus?"
- replace all "midi* at XXXX" (except "midi* at pcppi?") with a single
"midi* at midibus?"
sigcode), arrange to have the signal handler invoked directly, using
the trampoline only for the return path, saving a call insn. Play
some other stack trickery in the trampoline to turn 2 pushl's into
one movl.
Of course this does mean that ntop could potentially be platform specific, ie different versions for cats, acorn32 etc as struct uvm maybe a different size, but running on the same cpu architecture.
the user's SR registers to the kernel's SR registers on an exception or
interrupt from user level and restored with the user's SR register when the
exception or interrupt returns back to user level.
u_int16_t and int16_t for the X and Y count registers. GCC produces better
code this way.
Also, initialise the stored state in wsqms_enable(), so that the mouse doesn't
warp to a random position on open.
sysio streaming buffer flushes write a single 8-byte aligned 8-byte
value.
psycho streaming buffer flushes write a 64-byte aligned 64-byte block.
So separate out the streaming buffers into their own structure and pass those
in to all iommu operations. This also means we only flush the correct
streaming buffer for psycho rather than needing to flush both just in case.
sc_flags was never read. G/C it.
wsqms_attach() took two arguments that pointed to the same structure. G/C one
of them
Since wsqms controls the same device as qms, have it match the same attach
args.
Use a callout rather than hanging off the VSYNC interrupt.
Don't emit WSMOUSE_INPUT_ABSOLUTE events, since this isn't an absolute device.
Handle counter wrap-around sensibly, rather than limiting counts.
Don't gratuitously copy sc->sc_dev onto itself at attach time.
the palette generation to work with arbitrary numbers of bits.
This allows X to work after a fashion, since it tries to put the VIDC into
a 6:5:5 mode itself (which we ignore). Anything that actually tries to take
advantage of the DirectColor visual it offers will still be screwed, but I
hope such applications are rare.
Makoto Fujiwara <makoto@ki.nu> and Manuel Bouyer <bouyer@netbsd.org>.
Help from Allen Briggs, Jason Thorpe, and Matt Thomas.
We need to call cpu_cache_probe() early in boot (machdep.c).
Add 603 info for completeness, and use NBPG not PAGESIZE, as the
latter relies on uvm being setup (cpu_subr.c).
Let uvm_page_recolor() be called before uvm has been set up; just
note the page coloring value (uvm_page.c).
while here, correct labelsector/offset mismatch in writedisklabel,
when readdisklabel() have found the label at nonstandard location
(due to magic number search). a lot of other ports have the same problem.
New files are same as old (except for whitespace differences), except
that the new GENERIC doesn't have melody, because GENERIC defines
DRACO and the latter can't have it.
scw