NULL for root PCI busses. For busses behind a bridge, it points to
a persistent copy of the bridge's pcitag_t. This can be very useful
for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
uses OFW device nodes to enumerate the bus. When a PCI bus that is
behind a bridge is attached, pci_attach_hook() allocates a new PCI
chipset tag for the new bus and sets it's "curnode" to the OFW node
of the bridge. This is used as a starting point when enumerating
that bus. Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.
to schedule clock interrupts at a fixed interval, rather scheduling
the next one based on the time of the arrival/servicing of the previous
clock interrupt. Also, pick up a trick from the sbmips port to convert
a division in ip22_clkread to a multiplication, since those are much
cheaper -- the details of that are described in Simon's commit (see
Message-Id: <20020306073437.1D2A8B004@cvs.netbsd.org>). Thanks to
Jason Thorpe and Dominic Sweetman's "See MIPS Run" (where I found
mention of this very subject while looking for something totally un-
related! 8-) for the clue about the source of the timekeeping problems.
For the IP32, where we have no clock-calibration code yet, use the CPU
frequency provided by ARCS instead; it beats a hard-coded value!
As an added bonus, most of the CPU-clock related stuff is now collected
together in cpu_info_store, rather than as a collection of unorganized
global variables.
generally translates to "high interrupt load") -- the old code re-enabled
interrupts in the machine-specific hardware interrupt handler causing the
handler to be re-entered, possible multiple times. Could lead to kernel
stack overflows, and all sorts of mysterious crashes/hangs as a result.
While here, fix up the IP32 interrupt handler code to also not re-enable
interrupts.
Thanks for ideas/comments go to Chuq and Stephen Ma.
* Pull in dev/mii/files.mii from conf/files, rather than playing
the magic "files include order" dance in N machine-dependent
configuration definitions.
become ippp (ISDN ppp) and irip (ISDN raw IP). The character device now
are called: /dev/isdn (isdnd <-> kernel communication), /dev/isdnctl (dialing
and other control), /dev/isdntrc* (tracing), /dev/isdnbchan* (raw B channel
access, i.e. for user land PPP) and /dev/isdntel* (telephone devices, i.e.
for answering machines).
deal with shortages of the VM maps where the backing pages are mapped
(usually kmem_map). Try to deal with this:
* Group all information about the backend allocator for a pool in a
separate structure. The pool references this structure, rather than
the individual fields.
* Change the pool_init() API accordingly, and adjust all callers.
* Link all pools using the same backend allocator on a list.
* The backend allocator is responsible for waiting for physical memory
to become available, but will still fail if it cannot callocate KVA
space for the pages. If this happens, carefully drain all pools using
the same backend allocator, so that some KVA space can be freed.
* Change pool_reclaim() to indicate if it actually succeeded in freeing
some pages, and use that information to make draining easier and more
efficient.
* Get rid of PR_URGENT. There was only one use of it, and it could be
dealt with by the caller.
From art@openbsd.org.
Be consistant in the way that MSIZE, MCLSHIFT, MCLBYTES and NMBCLUSTERS
are defined.
Remove old VM constants from cesfic port.
Bump MSIZE to 256 on mipsco (the only one that wasn't already 256).
simonb