Commit Graph

200 Commits

Author SHA1 Message Date
fvdl
7dd7f8baa2 Handle 64bit DMA addresses on PCI for platforms that can (currently only
enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.
2003-06-15 23:08:53 +00:00
scw
3e475eb186 From PR port-i386/20464, by Yoshihisa Nakagawa: Match i845G AGP bridge. 2003-04-16 07:37:09 +00:00
perry
773de18a27 Recognize VT82C596A
Patch from Christopher SEKIYA in PR port-i386/21013
2003-04-05 16:03:48 +00:00
thorpej
b4fe782331 Use PAGE_SIZE rather than NBPG. 2003-04-01 20:48:27 +00:00
fvdl
b7b9aa9909 Moved to x86/pci. 2003-02-27 00:30:21 +00:00
fvdl
ab4edb55ec Adapt for i386/x86 change. 2003-02-26 22:21:19 +00:00
jdolecek
1b76f8f55f One more ServerWorks host bridge, seen on Dell PowerEdge server
fix provided in PR port-i386/20333 by Sverre Froyen
2003-02-14 14:26:51 +00:00
jdolecek
1677351fab match anything which claims to be PCI-EISA bridge
the explicit check for Intel PCI-EISA bridge was left in, just in case
it wouldn't identify itself as PCI-EISA bridge

fixes PR kern/9589 by Johan Danielsson
2003-02-08 12:00:36 +00:00
simonb
b4509098d5 Put the storage class first. 2003-01-20 01:25:04 +00:00
fvdl
5692526bb6 Remove duplicate assignment. 2003-01-14 11:13:25 +00:00
fvdl
d928619394 Add a couple more ServerWorks host bridges that explicitly need IO space
enabled.
2003-01-14 10:56:53 +00:00
thorpej
1132348b98 Use aprint_normal() for cfprint routines. 2003-01-01 01:24:19 +00:00
explorer
4b995bb9a4 fix for my sony laptop, which doesn't quite follow spec 2002-12-30 21:55:05 +00:00
fvdl
ae4b76c8d3 New interrupt code. The basic idea behind it is to hide the differences
in interrupt controllers in struct pic, and try to keep as much
common code as possible. At the lowest (asm) level, this is done
with CPP macros.

The main structure is now struct intrsource, describing an established
interrupt line, of any kind (soft/hard local apic/legacy apic/IO apic).
For quick masking, there may be a maximum of 32 sources per CPU.
Sources can be assigned to any CPU in the MP case, though currently they
all go to the boot CPU.
2002-11-22 15:23:35 +00:00
thorpej
b000f2251b * Add "struct device" to the softc.
* Add missing notice.

Problems pointed out by Jonathan Stone.
2002-10-17 22:03:40 +00:00
thorpej
1ad8e0ff42 Tidy up CFATTACH_DECL() formatting. 2002-10-02 05:47:08 +00:00
fvdl
26ab868e68 Merge Bill Sommerfeld's i386 MP branch. This code has some known
caveats, but works quite well in a lot of MP cases, and all
UP cases that I have tested. Parts of this will hopefully be
reworked in the not-too-distant future.
2002-10-01 12:56:36 +00:00
thorpej
f818766afe Declare all cfattach structures const. 2002-09-27 20:31:45 +00:00
provos
0f09ed48a5 remove trailing \n in panic(). approved perry. 2002-09-27 15:35:29 +00:00
simonb
4e3613273b Remove breaks after returns, unreachable returns and returns after
returns(!).
2002-09-23 05:51:10 +00:00
kanaoka
c9aa0785fe Add support for "Intel 82801DB LPC".
kern/18348: From Andreas Wrede <andreas@planix.com>.
2002-09-20 14:52:39 +00:00
thorpej
7d2b11a8b0 Add a driver for the AMD Elan SC520 System Controller. The "elansc"
driver attaches where "pchb" would normally attach (it matches at a
higher match priority).  The "elansc" driver currently provides support
for the watchdog timer built-in the SC520.

Thanks to Jasper Wallace for laying the ground-work for this (most
notably by providing a work-around for a watchdog-related bug in the
SC520).
2002-08-12 01:03:12 +00:00
minoura
013897f2cc Add quirk for Connectix Virtual PC 5 (for Windows at least) emulated
PCI bridge (440BX).
Note that there's still a problem that emulated 21140 cannot be driven
by if_tlp.  Workaround is to use if_de.
2002-08-10 03:37:40 +00:00
drochner
a548b203d4 use PCI_ID_CODE instead of a local macro (cosmetics) 2002-06-25 21:18:32 +00:00
thorpej
3d7cdd4ec5 Add support for auxillary busses on the Intel 82452 PCI-Host
bridge.  PR 17353, from MOCHIDA Shuji.
2002-06-21 16:03:33 +00:00
tron
98568ec314 Add missing calls to bus_space_unmap(9) when the hardware RNG is not
detected, cannot be activated or doesn't work.
2002-06-09 15:02:25 +00:00
lukem
06de426449 SIMPLEQ rototill:
- implement SIMPLEQ_REMOVE(head, elm, type, field).  whilst it's O(n),
  this mirrors the functionality of SLIST_REMOVE() (the other
  singly-linked list type) and FreeBSD's STAILQ_REMOVE()
- remove the unnecessary elm arg from SIMPLEQ_REMOVE_HEAD().
  this mirrors the functionality of SLIST_REMOVE_HEAD() (the other
  singly-linked list type) and FreeBSD's STAILQ_REMOVE_HEAD()
- remove notes about SIMPLEQ not supporting arbitrary element removal
- use SIMPLEQ_FOREACH() instead of home-grown for loops
- use SIMPLEQ_EMPTY() appropriately
- use SIMPLEQ_*() instead of accessing sqh_first,sqh_last,sqe_next directly
- reorder manual page; be consistent about how the types are listed
- other minor cleanups
2002-06-01 23:50:52 +00:00
tron
0f15ab8163 Remove senceless benchmark loop for i8xx hardware random generator
attach code. The throughput was neither calculated nor displayed.
2002-05-28 17:25:43 +00:00
tron
94d3fd0f89 Add hardware random generator support for Intel i845, i850 and i860
chipsets.
2002-05-28 17:23:07 +00:00
thorpej
204183c0fa * Add "pcitag_t *pba_bridgetag" to pci_attach_args. This is set to
NULL for root PCI busses.  For busses behind a bridge, it points to
  a persistent copy of the bridge's pcitag_t.  This can be very useful
  for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
  uses OFW device nodes to enumerate the bus.  When a PCI bus that is
  behind a bridge is attached, pci_attach_hook() allocates a new PCI
  chipset tag for the new bus and sets it's "curnode" to the OFW node
  of the bridge.  This is used as a starting point when enumerating
  that bus.  Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.
2002-05-16 01:01:28 +00:00
he
be17728da0 Also correct the attach flags to enable IO space on the Intel 450NX.
OK'ed by fvdl.
2002-03-16 22:17:27 +00:00
thorpej
1addb1955a Default to telling the MI PCI code that rd/line, rd/mult, and wr/inv
commands are OK.
2002-02-28 21:48:05 +00:00
jdolecek
f32b3f4f89 Reduce the massive code duplication regarding joy(4). Split it into
MI and MD parts, and make ISA/ISAPNP/PCI joy(4) attachments MI.
2002-02-02 18:37:38 +00:00
christos
7da411d63b Look for _PIR in addition to $PIR. My libretto L2 now works without
any other kludges.
2002-01-28 23:53:08 +00:00
uch
a68b39d7c2 Reset configuration of bridge order before enumerating bridge devices.
This is required when two or more bridges on the same bus, and some of
them are incompletely initialized by BIOS.
Reported by NAKAGAWA Yoshihisa <y-nakaga@nwsl.mesh.ad.jp>
2002-01-22 15:08:53 +00:00
uch
29d84d9a58 Add pci_bridge_foreach (). 2002-01-22 15:07:27 +00:00
augustss
f3b996d67a Add the i830 bridge. 2002-01-14 01:45:54 +00:00
fvdl
a3cd944f25 Also correct the attach flags to enable IO space on the ServerWorks
CNB20LE.
2001-12-16 21:33:06 +00:00
onoe
d5d707cf1d Add 82801BAM as piix.
Do not initialize global variables 'pciintr_icu_tag' to NULL.
Its type is 'const struct pciintr_icu *' (typedef'ed) and gcc sometimes(!)
put it in Text region.  So force arrrange it to BSS.
2001-12-07 08:07:57 +00:00
lukem
95c969f245 add RCSID 2001-11-15 07:03:28 +00:00
drochner
8002eb91a6 -fix botched switch/case nesting which made AGP on i810 in GFX mode fail
-remove the check for i810's internal graphics completely: we'll attach
 AGP whether in GFX or AGP mode anyway, and the SMRAM register test
 was of questionable value (should have masked with 0xc0, but even then
 the builtin graphics appeared enabled although I used an external
 PCI card)
2001-09-17 12:07:32 +00:00
thorpej
0019ea5ce6 Clean up the AGP match/attach code somewhat. 2001-09-15 00:24:59 +00:00
tshiozak
5341bac833 correct the set/get trigger code for ALi M1543 interrupt router. 2001-09-13 14:00:52 +00:00
fvdl
43bbb8500a Apparently some ServerWorks Host-PCI bridges only get their memory space
enabled, even though IO space does work. A few drivers (like ahc)
will only work reliably with IO space, so check for this condition
and correct it.
2001-09-12 08:25:17 +00:00
fvdl
8e76d96c85 wrap decl in #if NAGP > 0 2001-09-10 10:54:46 +00:00
fvdl
2c8172cbd3 Attach agp gart support @ pchb. Not very clean, but agp support may
be spread over several devices, and the phcb is usually the main one.

Add agp_machdep.c file which implements MD agp functions (currently
just agp_flush_cache).
2001-09-10 10:06:54 +00:00
enami
bab65a8da3 Mix random data directly into the pool and increase entropy instead of
estimating entropy with polling based timing.
2001-09-09 00:48:54 +00:00
kanaoka
3b4f143fd8 - Correct a value of subend.
Pointed out by enami tsugutomo <enami@but-b.or.jp>.
2001-08-27 13:02:12 +00:00
haya
31d98218e8 Add support for ALi M1543 in pcibios. 2001-08-27 08:21:20 +00:00
haya
3d57cec099 Add new entry for intel ICH2 LPC interrupt router. It has
upper compatibility with piix.
2001-08-01 09:11:19 +00:00