the fmovecr constant table has the internal format
of the constants. So, when changing the mantissa size by a
non-multiple of 32 bits, we'd have to change this table, too. As
all other code changes just chopped of the least significand
32bit word of the mantissa, we correct the mantissa size instead
to (115 - 32 == 83) bits.
fpu_fmovecr.c:
put a safety belt in, to catch the next person who doesn't know this.
fpu_int.c:
in one place, the reduction of the mantissa size was overlooked.
fpu_log.c:
as the most significand 32bit word of the mantissa was changed back to the
old format, change back the table indexing code, too.
This should fix PR 11045.
I've fixed most (not all) m68k FPE bugs that give bogus
calculation results, esp. fsqrt instruction. Also, the internal FP
representation has been reduced from 115-bit mantissa to 67-bit
mantissa which reduced the required mantissa operation roughly by one
fourth. I've done an extensive (though not exhaustive - it's
impossible!) test on the internal routines by feeding them randomly
generated FP numbers, and found that the new code is more precise than
MC68040 FPU (it seems to have a rounding bug).
[ Only change was to keep fpu_calcea.c's name instead of renaming to
fpu_ea.c in Ken's patch. --akb ]
<kenn@remus.rutgers.edu>. This emulator does not yet emulate
the following functions:
FSINH, FETOXM1, FTANH, FATAN, FASIN, FATANH, FSIN, FTAN,
FETOX, FTWOTOX, FTENTOX, FCOSH, FACOS, FCOS, FSINCOS
It is sufficient, however, to allow programs like df, w, and newfs,
to run to completion with correct results.
Portions of this code were based on the sparc fpe and on initial
work by gwr.
is