Commit Graph

872 Commits

Author SHA1 Message Date
chs ecdf1b4084 add missing protos, clean up includes. 2002-10-05 17:16:33 +00:00
chs 038d3a7684 add missing protos. 2002-10-05 17:12:09 +00:00
chs 65c08c58b4 copy over some stuff from the shark version of this file.
(how did this compile before?)
add missing protos.
2002-10-05 17:04:44 +00:00
chs cdd13585e9 add missing protos. 2002-10-05 17:01:51 +00:00
bjh21 96f1e7a472 Correct some gratuitously-wrong indentation. 2002-10-05 13:57:11 +00:00
bjh21 3832819227 Minimal changes to allow a kernel with "options MULTIPROCESSOR" to compile
and boot multi-user on a single-processor machine.  Many of these changes
are wildly inappropriate for actual multi-processor operation, and correcting
this will be my next task.
2002-10-05 13:46:57 +00:00
chris dfcb3e3552 Add random jitter to stat clock, the random jitter is +- 511 usec's, so
we should average the nominal clock rate.

stathz now runs at hz (the hard clock hz), without getting high amounts of
time in interrupt handling.
2002-10-05 12:22:55 +00:00
elric d19d268a95 assign majors for raw and cooked cgd's. 2002-10-04 18:28:24 +00:00
thorpej 072eedb728 Add a symbolic constant for where external interrupts start. 2002-10-03 20:10:40 +00:00
thorpej bd5bb4652b Add trailing ; to CFATTACH_DECL 2002-10-02 15:45:10 +00:00
thorpej c5e91d447d Use CFATTACH_DECL(). 2002-10-02 04:55:47 +00:00
bjh21 b828507087 constify various string tables. 2002-10-01 22:33:10 +00:00
bjh21 b585e1d57a Remove a spurious ']' from the CFATTACH_DECL invokation. 2002-10-01 22:11:14 +00:00
reinoud 4d64d47a1f Remove old unused cruft 2002-10-01 21:16:15 +00:00
reinoud 7ba11c51fd Fix some small range checks and why weren't we writing the palette in when
we're asked to set the VIDC in a given state! :-D ahum... these are fixed
now. The top palette entry wasn't set.
2002-10-01 12:09:49 +00:00
thorpej f59e5352f2 Use CFATTACH_DECL(). 2002-10-01 04:21:32 +00:00
thorpej d1c37db940 Use CFATTACH_DECL(). 2002-10-01 03:10:12 +00:00
chris d0879e89ef cats and netwinder can share a common footbridge_intr.h file, so install and
share a common file.
2002-09-28 15:53:03 +00:00
chris 4c5586750b Enable the use of a seperate statclock.
Currently statclock runs at 64hz, maybe it should be faster or slower, I did
try it being the same as hz, but that just made it look like we spent 10% of
time handling interrupts, rather than the 3% that this gives.

Also fix the IPL_LEVELS for netwinder.
2002-09-28 15:44:29 +00:00
chris c3354b9779 Interrupt 19 does actually do something:
19	PMCSR written by host
(all to do with power management)
2002-09-28 10:34:02 +00:00
thorpej 9a711d6985 Declare all cfattach structures const. 2002-09-27 20:29:02 +00:00
provos 0f09ed48a5 remove trailing \n in panic(). approved perry. 2002-09-27 15:35:29 +00:00
thorpej 6c88de3b53 Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller.  Use it
rather than invoking cfattach->ca_match directly.
2002-09-27 03:17:40 +00:00
thorpej d1ad2ac4f2 Rather than referencing the cfdriver directly in the cfdata entries,
instead use a string naming the driver.  The cfdriver is then looked
up in a list which is built at run-time.
2002-09-27 02:24:06 +00:00
thorpej 71404bb533 Don't include <sys/map.h>. 2002-09-25 22:21:01 +00:00
chs f01058c887 rename the existing pmap_remove_all() here to pmap_page_remove()
(ala the x86 pmap) to avoid conflicting with the new pmap interface
function of the same name.
2002-09-22 07:56:57 +00:00
chs c081614ea2 it really helps to get the stub right before cutting + pasting it 27 times.
alas, I did not.  doh.
2002-09-22 07:53:39 +00:00
chs 55e1f79335 add pmap_remove_all() hook (empty on most platforms so far). 2002-09-22 07:17:08 +00:00
simonb eb4524608c Only need to define __HAVE_MD_RUNQUEUE once here... 2002-09-22 05:56:32 +00:00
gmcgarry dca80f08fd Add __HAVE_MD_RUNQUEUE flag for MD code to override MI run queue primitives. 2002-09-22 04:11:32 +00:00
nathanw 2cab03d64a In the fault handler, record growth of the stack, so that core dumps
actually contain the entire stack.
2002-09-21 00:29:04 +00:00
manu e77de5cb68 Initial APM support (enough to get battery level) 2002-09-16 19:52:52 +00:00
skrll 1f4f5626a4 Fix typos in comment. 2002-09-15 20:11:55 +00:00
gehenna 77a6b82b27 Merge the gehenna-devsw branch into the trunk.
This merge changes the device switch tables from static array to
dynamically generated by config(8).

- All device switches is defined as a constant structure in device drivers.

- The new grammer ``device-major'' is introduced to ``files''.

	device-major <prefix> char <num> [block <num>] [<rules>]

- All device major numbers must be listed up in port dependent majors.<arch>
  by using this grammer.

- Added the new naming convention.
  The name of the device switch must be <prefix>_[bc]devsw for auto-generation
  of device switch tables.

- The backward compatibility of loading block/character device
  switch by LKM framework is broken. This is necessary to convert
  from block/character device major to device name in runtime and vice versa.

- The restriction to assign device major by LKM is completely removed.
  We don't need to reserve LKM entries for dynamic loading of device switch.

- In compile time, device major numbers list is packed into the kernel and
  the LKM framework will refer it to assign device major number dynamically.
2002-09-06 13:18:43 +00:00
jdolecek 8839507f5b whitespace fix past __KERNEL_RCSID() 2002-09-05 18:34:00 +00:00
manu 9d459610ba When the serial port was not checked in hpcboot on hpcarm, writing to
/dev/ttyS0 crashed the kernel. This is because sacom_filltx uses some
uninitialized static variables. Pulling the salues from softc instead
fixes the problem (this is what was done before the drver was moved
from /sys/arch/hpcarm to /sys/arch/arm, anyway).
2002-09-02 05:27:39 +00:00
thorpej 212cb9f78d Add machine-dependent bits of RAS for arm32. 2002-08-31 03:07:32 +00:00
briggs 37019d791a Use generic_bs_sr_4 for bus_space_set_region_4. 2002-08-29 17:29:34 +00:00
briggs 043080912d Add generic_bs_sr_4 2002-08-29 17:27:48 +00:00
thorpej 70b58c9c1e In bounds_check_with_label(), look for the label sector in RAW_PART,
not "a".
2002-08-27 17:30:02 +00:00
thorpej 139cdc3125 Make nbuf, nswbuf, and bufpages unsigned. Make all operations on these
variables unsigned, and update places where their values are printed.
2002-08-25 20:21:33 +00:00
thorpej ffdedb6d80 In pmap_map_in_l1() and pmap_unmap_in_l1(), make sure that the VA
that is passed in is already aligned to a 4M super-section.
2002-08-24 03:10:40 +00:00
thorpej d158b3a37a When we allocate a PTP, make sure the offset we specify is for
the 4M super-section that the PTP will map, not some random 1M
chunk of it.  This gives the PTP hint code a much better chance
to working properly, and allows us to tidy up the code that
flushes a PTP from the cache in pmap_destroy().
2002-08-24 02:50:53 +00:00
thorpej aafe6e006c Define macros describing the 4M super-sections that our pmap
actually uses (since we allocate PT pages in 4K chunks, rather
than 1K chunks).
2002-08-24 02:48:50 +00:00
thorpej 77a6866508 Enable caching on kernel and user page tables. This saves having
to do uncached memory access during VM operations (which can be
quite expensive on some CPUs).

We currently write-back PTEs as soon as they're modified; there is
some room for optimization (to write them back in larger chunks).
For PTEs in the APTE space (i.e. PTEs for pmaps that describe another
process's address space), PTEs must also be evicted from the cache
complete (PTEs in PTE space will be evicted durint a context switch).
2002-08-24 02:16:30 +00:00
briggs 02aeef1d79 Handle copies to unaligned addresses a bit better. 2002-08-22 05:01:02 +00:00
thorpej 6cc7c1c1ff * Add PTE_SYNC() and PTE_SYNC_RANGE() macros. These don't actually do
anything yet.
* Use PTE_SYNC() and PTE_SYNC_RANGE() in some obvious places, i.e.
  where vtopte() is used.
2002-08-22 01:13:53 +00:00
thorpej 574a9cc019 Use a pool cache for PT-PTs. 2002-08-21 21:22:52 +00:00
thorpej 5fddbbe3d5 Do cached memory access to L1 tables, making sure to write-back the
cache after any L1 table modifications.
2002-08-21 18:34:31 +00:00
briggs 88452ee2b5 Coalesced writes on xscale systems do not always work. If
XSCALE_NO_COALESCE_WRITES is set, disable.  Otherwise, enable.
2002-08-20 02:30:51 +00:00