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17 Commits

Author SHA1 Message Date
thorpej
c10a9d31ea Put the code that enables/disables Pyxis interrupt lines in 
cia_pyxis_intr_enable().
 2000-03-19 01:43:25 +00:00
thorpej
a3759d67fe Don't do rd/line, rd/mult, or wr/inval on the buggy Miata 1's. 1999-11-04 19:11:51 +00:00
thorpej
eb32016a95 Split up using BWX for PCI config and bus access. Default to using BWX for 
the former, but not the latter.  Hopefully, this will address some problems
people have been experiencing w/ some devices on Pyxis systems when BWX
is used for bus access.  (If it's not used for PCI config access, we can
get fatal machine checks while probing behind PCI-PCI bridges!!)
 1998-07-29 01:28:44 +00:00
thorpej
d4d49905dd Add support for using BWX for PCI config space and PCI i/o and mem space 
on the ALCOR2 and Pyxis.  BWX is enabled iff:
- It hasn't been disabled by the user (patch `cia_use_bwx' or build cia.o
  with the option "CIA_USE_BWX=0"),
- it's enabled in CIA_CSR_CNFG,
- we are running on an EV5-family processor,
- BWX is in the processor's capabilities mask.
 1998-06-04 21:34:45 +00:00
thorpej
6172f5a0ac Use flags instead of a bunch of booleans. Add a "use bwx" flag. 1998-05-12 19:07:21 +00:00
thorpej
34bbe5cd80 Rework ALCOR/ALCOR2/Pyxis recognition Yet Again. (Actually, just the 
way it's displayed, and mask off the revision once we've determined
which chip we're talking to.)
 1998-05-11 23:56:16 +00:00
thorpej
879c4c5cf4 If the CIA revision is >= 2, read the CIA configuration register, and 
remember its contents.  Print out a bit of information about the chip,
including whether or not it supports the EV56 BWX instructions.
 1997-09-17 01:34:18 +00:00
thorpej
991f4ebc72 cia_bus_ -> cia_swiz_bus_ 1997-09-02 20:07:20 +00:00
thorpej
aa7a2876e6 Treat bus space tags more like pci chipset tags and bus dma tags: allocate 
them statically within a chipset's state structure, and pass them to
the *_bus_{io,mem}_init() functions.
 1997-09-02 12:40:18 +00:00
thorpej
46b89d7739 Pull thorpej-bus-dma branch into mainline. 1997-06-06 23:54:24 +00:00
cgd
51f119d429 clean up NetBSD RCS ID strings 1997-04-07 01:59:51 +00:00
cgd
608a9f3065 update for new extent management code 1996-11-25 03:49:11 +00:00
cgd
1b03f1bca7 update for new bus.h macros. bus_io_* and bus_mem_* integrated into 
single bus_space_* framework.  Unfortunately, bus_space_{read,write}_*
operations still imply barriers.  That will change soon.
 1996-10-23 04:12:13 +00:00
cgd
2465bd00e5 store HAE_MEM and HAE_IO register contents in the cia configuration 
structure, and add prototypes for the bus_{mem,io}_init() functions.
 1996-06-10 00:03:59 +00:00
cgd
576c769331 clean up copyrights and RCS IDs 1996-04-12 06:07:05 +00:00
cgd
931ec3829c partially update for new ISA/EISA/PCI and 'bus' interfaces. not yet 
complete, or tested.
 1996-04-12 04:40:49 +00:00
cgd
deb4082f80 wholesale update from my NetBSD/Alpha source tree. Includes: 
Support for AXPpci CPUs,
	Support for AlphaStation 600 CPUs,
	new boot block structure, which requires an 'installboot'
	    program and works a lot like the NetBSD/sparc boot blocks.
 1995-11-23 02:33:17 +00:00