rather than and-ing 16G-1. That just strips the k0seg bits, rather
than making the false assumption that the physical address is going
to be in the lower 16G. That doesn't apply for CIA device-space
addresses, for instance.
more naturally in terms of way the OSF/1 PALcode delivers traps and
interrupts. Clean up fault/exception handling code and system entry
points. Seperate ASTs into a seperate C function.
(2) Restructure and improve machine check and correctable error
handling based on information in the 2nd Ed. of the Alpha Architecture
Reference Manual.
(3) Removed unused (and not likely useful) PALcode assembly stubs.
containing a substruct (the hardware frame) and an array of registers,
treat it like one big array of registers, for easier and prettier
access. Update everything to deal with that.
Process Control Block
Interrupt/Exception/Syscall Stack Frame
Machine Check Error Summary Register
Machine Check Logout Area
clean up some, and add prototypes for all of the CPU instruction and
PALcode function stubs.
cgd